Wireless MAC Design Engineer

Apple Inc

Quick summary

Work type
On-site
Location
Sunnyvale, CA
Salary
$126,800–$220,900 / yr
Posted
37 days ago

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $172k
This role $174k
$116k most similar roles pay here $232k

This role pays more than 61% of similar roles. Most pay $144,562–$198,800 — the shaded band above. At the midpoint, this role pays about $174k versus about $172k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 969 open roles on FindRole.

Listed pay typically runs $163,300–$272,100 across 756 roles with salary data.

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At a glance

TL;DR · Wireless MAC Design Engineer

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Join Apple’s wireless silicon development team as a Wireless MAC Design Engineer, focusing on creating highly energy-efficient designs for next-generation SoCs. Your role will involve developing the microarchitecture and writing efficient RTL code for the MAC layer of wireless communication systems, ensuring design cleanliness and collaborating with verification teams to debug and test pre-silicon prototypes. You’ll also support post-silicon validation efforts and work closely with synthesis teams on timing closure. Essential skills include a strong background in digital logic design, proficiency in Verilog or SystemVerilog, and knowledge of digital design flows such as RTL simulation, synthesis, and STA. Experience with wireless standards like IEEE 802.11 and Bluetooth is beneficial, as well as expertise in low-power ASIC design techniques.

Skills

Verilog SystemVerilog RTL Synthesis Lint STA LEC IEEE 802.11 IEEE 802.15 Bluetooth 3GPP ASIC CDC RDC Multiple supply domains configuration Dynamic power/clock scaling Power analysis

What you'll do

  • Develop MAC layer microarchitecture and RTL for wireless communication SoCs based on system-level requirements.
  • Ensure lint, CDC, RDC cleanliness and collaborate with synthesis team for timing closure.
  • Support verification teams during pre-silicon validation and SW/FW development.
  • Assist in post-silicon validation, system integration, and debug efforts.
  • Work closely with systems and software teams to ensure performance and power efficiency.

What we're looking for

  • BS in Electrical Engineering, Computer Engineering, or related field required.
  • Strong understanding of digital logic design fundamentals.
  • Ability to translate functional requirements into synthesizable Verilog/SystemVerilog RTL.
  • Knowledge of digital design flows including simulation, synthesis, linting, and STA.
  • Excellent organizational and communication skills (written and oral).
  • Experience in ASIC microarchitecture and RTL design preferred.
  • Understanding of wireless standards like IEEE 802.11, Bluetooth, or 3GPP beneficial.

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