WiFi MAC Design Verification Engineer

Apple Inc

Quick summary

Work type
On-site
Location
Sunnyvale, CA
Salary
$181,100–$318,400 / yr
Posted
2 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $173k
This role $250k
$104k most similar roles pay here $341k

This role pays more than 97% of similar roles. Most pay $152,643–$193,937 — the shaded band above. At the midpoint, this role pays about $250k versus about $173k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1816 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1473 roles with salary data.

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At a glance

TL;DR · WiFi MAC Design Verification Engineer

As a Senior WiFi MAC Design Verification Engineer at Apple’s Wireless Connectivity Silicon team, you will play a pivotal role in developing cutting-edge Wi-Fi technology for future Apple products. Your responsibilities include owning critical block and subsystem verification of WIFI MAC, architecting test-benches, and defining new verification methodologies using AI-based tools like Claude Code to enhance productivity. You’ll work closely with design, systems, software engineering teams to review specifications, extract features, and define verification plans while driving coverage analysis and closure. This role requires advanced knowledge in OOP, SystemVerilog, UVM, and a strong background in ASIC design and verification flows, making it ideal for those passionate about advancing wireless technologies at scale.

What you'll do

  • Own critical block and sub-system verification of WIFI MAC.
  • Architect and develop test-benches and environments using AI-based tools.
  • Create, simulate, and debug complex test scenarios for Wi-Fi protocols.
  • Lead regression testing and manage issue tracking effectively.
  • Drive coverage analysis to ensure comprehensive verification closure.

What we're looking for

  • Proven experience leading ASIC design verification methodologies at the cluster, subsystem, or full-chip level.
  • Advanced knowledge of standard ASIC design and verification flows.
  • Deep proficiency in OOP, SystemVerilog, and UVM.
  • Strong analytical skills for debugging complex design issues.
  • Experience with AI-based tools for verification automation (e.g., Claude Code).
  • Knowledge of wireless connectivity or MAC verification preferred.

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