VLSI Design Engineer for Server / Data Center Products

Qualcomm

Confirmed live yesterday Low trust

Quick summary

Work type
On-site
Location
San Diego, CASanta Clara, CAAustin, TX
Salary
$140,000–$210,000 / yr
Posted
126 days ago
Freshness
Confirmed live yesterday
Closes
Nov 4, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $188k
This role $175k
$130k most similar roles pay here $235k

This role pays less than 64% of similar roles. Most pay $160,000–$216,250 — the shaded band above. At the midpoint, this role pays about $175k versus about $188k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · VLSI Design Engineer for Server / Data Center Products

The VLSI Design Engineer for Server / Data Center Products joins a fast-paced SoC team focused on RTL design, flows, and methodology for high-performance ASICs in advanced process nodes. This role involves overseeing the definition, design, verification, and documentation of ASIC development while determining architecture design, logic design, large-scale integration, and system simulation. The engineer will build arithmetic, computational, and machine learning IPs while ensuring designs meet specific requirements for speed and power efficiency. Key technical competencies include experience with server and data center IPs, protocols, and interfaces, alongside skills in scripting for process automation. The position addresses the development of new architectures for high-performance compute and AI spaces. Candidates must possess strong analytical skills to resolve complex architecture or verification problems while collaborating with peer teams to improve design flows and methodologies.

What you'll do

  • Execute the architecture and design of SoCs according to provided design protocols.
  • Design arithmetic, computational, and machine learning IPs for high-performance computing.
  • Resolve complex architecture, design, and verification problems using standard ASIC engineering practices.
  • Develop and execute design and verification strategies based on SoC and IP core specifications.
  • Determine architecture designs, logic designs, large-scale integration, and system simulations.
  • Identify and implement flow improvements through advanced design techniques and automation scripts.
  • Provide feedback on silicon learnings to the process team and design methodology teams.

What we're looking for

  • Bachelor's degree in Science, Engineering, or a related field with 4+ years of ASIC design experience.
  • Master's degree in Science, Engineering, or a related field with 3+ years of ASIC design experience.
  • PhD in Science, Engineering, or a related field with 2+ years of ASIC design experience.
  • Proven knowledge of Server and Data Center IPs, protocols, and interfaces.
  • Experience designing arithmetic, computational, or machine learning IPs.
  • Expertise in design techniques for speed and power efficiency.
  • Ability to develop tools and scripting for process automation.
  • Strong communication skills and ability to work effectively as a team player.

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