System Hardware Board Design Engineering Leader (PCB)

Cisco

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Milpitas, CA
Salary
$194,600–$285,700 / yr
Employment
Full-time
Posted
2 days ago
Freshness
Confirmed live today
Closes
Jan 29, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $200k
This role $240k
$145k most similar roles pay here $301k

This role pays more than 81% of similar roles. Most pay $168,425–$231,300 — the shaded band above. At the midpoint, this role pays about $240k versus about $200k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 240 open roles on FindRole.

Listed pay typically runs $167,700–$245,200 across 187 roles with salary data.

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At a glance

TL;DR · System Hardware Board Design Engineering Leader (PCB)

System Hardware Board Design Engineering Leader (PCB) serves as a technical expert within the Common Hardware Group to shape multi-year hardware architecture and design standards for high-performance networking products. This individual contributor role involves defining power-delivery strategies, establishing reusable methods, and leading cross-functional initiatives from concept through production. The position focuses on solving complex problems related to signal integrity, power integrity, and reliability for advanced systems featuring PCIe, Ethernet, DDR, and SerDes. Key technical requirements include proficiency with Cadence design tools, HyperLynx, ANSYS, Keysight ADS, and Python for automation. Candidates will utilize lab instrumentation such as oscilloscopes and VNAs to validate hardware. The role addresses the challenge of developing next-generation routers and high-performance systems powered by advanced ASICs, ensuring robust performance across complex infrastructure environments while navigating technical trade-offs in high-speed digital design.

What you'll do

  • Define long-term hardware architecture, power-delivery strategies, and technology roadmaps for high-performance networking systems.
  • Lead multi-disciplinary hardware initiatives from initial concept through product release and customer delivery.
  • Serve as the senior escalation point for complex issues regarding signal integrity, power integrity, and manufacturing.
  • Establish reusable design methods, verification practices, and quality standards for board design.
  • Guide senior engineers through architecture reviews, technical trade-offs, and complex investigations.
  • Represent hardware engineering in executive reviews, supplier discussions, and industry standard activities.
  • Develop technical strategies that align multiple business units and engineering disciplines.
  • Identify future technology shifts to recommend investments in next-generation hardware capabilities.

What we're looking for

  • Must live within commuting distance of Milpitas, CA, and commute to the lab five days per week.
  • Bachelor's in Electrical or Computer Engineering with 11+ years experience, Master's with 7+ years, or PhD with 4+ years.
  • Experience in hardware board design and system architecture for high-performance systems including PCIe, Ethernet, DDR, SerDes, and thermal/EMI management.
  • Experience with high-speed digital design, signal and power integrity, and advanced lab instrumentation like oscilloscopes and logic analyzers.
  • Experience leading complex, multi-site, cross-functional engineering initiatives and partnering with silicon vendors and contract manufacturers.
  • Experience with advanced networking systems, ASICs, FPGAs, high-speed memory, and multi-gigabit SerDes (preferred).
  • Proficiency with Cadence tools, HyperLynx, ANSYS, Keysight ADS, and creating test scripts using Python (preferred).
  • Experience in co-packaged optics, ultra-high-speed signaling, and next-generation power delivery (preferred).

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