Staff Engineer, FPGA Design/Verification

GE Aerospace

Confirmed live yesterday High trust

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Work type
On-site
Location
Grand Rapids, MIClearwater, FLRockledge, NJ
Posted
2 days ago
Freshness
Confirmed live yesterday
Nearby
22 roles within 25 mi

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Salary context

How this pay compares to similar roles

Similar $190k
$135k most similar roles pay here $227k

This listing doesn't post a salary. Most similar roles pay $166,912–$212,500.

Based on 240 similar postings.

Employer

About GE Aerospace

GE Aerospace (General Electric Aerospace) designs and produces commercial and military jet engines, components, and integrated systems for aircraft manufacturers and airlines worldwide. Industry: Aerospace & Aviation Engines

GE Aerospace currently has 40 open roles on FindRole.

Listed pay typically runs $130,000–$173,000 across 23 roles with salary data.

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At a glance

TL;DR · Staff Engineer, FPGA Design/Verification

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Staff Engineer - FPGA Design/Verification serves as a technical leader within the custom logic team, driving innovation, program planning, and process improvements across multiple products. The role involves designing FPGA, ASIC, and CPLD devices for avionics hardware applications while managing requirements in DOORs and preparing DO-254 certification artifacts. Daily responsibilities include VHDL design, simulation, project scheduling, cost management, and developing complex architectures for the product area. Key technical skills required include proficiency in VHDL, UVM Test Benches, and tools such as Intel Quartus, Lattice Diamond, Microsemi Libero, and Xilinx Vivado. The role addresses critical challenges in avionics systems, requiring knowledge of high-speed data interfaces like PCIe, AXI bus, SERDES, and DMA, alongside specific aviation protocols including MIL-STD-1553, A429, A664, and TSN to ensure reliable hardware performance.

What does a Engineer earn?

Median $185000 from 249 postings across 48 companies.

See salary data

Skills

VHDL UVM FPGA ASIC CPLD Intel Quartus Lattice Diamond Microsemi Libero Mentor Graphics Expedition PCIe AXI SERDES DMA MIL-STD-1553 DO-254 System on Chip High Speed Data Interfaces

What you'll do

  • Design FPGA, ASIC, and CPLD devices for avionics hardware applications including innovative patentable solutions.
  • Perform VHDL design using industry-standard tools to execute hardware design and simulation.
  • Manage requirements development and documentation within the DOORs system for DO-254 certification artifacts.
  • Create and execute project plans for custom logic development, including scheduling and cost management.
  • Develop technical bids, proposals, and complex architectures for specific product areas.
  • Analyze data to provide technical recommendations and solve complex hardware design problems.
  • Mentor less experienced colleagues and build consensus on technical topics within the field.
  • Maintain comprehensive documentation of all technical data in accordance with engineering policies.

What we're looking for

  • Must be authorized to work in the United States.
  • Must have U.S. citizenship or be a "U.S. Person" as defined by export control regulations.
  • Bachelor's degree in Electrical or Computer Engineering from an accredited university.
  • Minimum of 8 years of professional experience in design.
  • Experience in VHDL and UVM Test Benches for FPGA, ASIC, and CPLD devices.
  • Experience with high-speed data interfaces such as PCIe, AXI bus, SERDES, and DMA.
  • Experience with avionics interfaces and protocols including MIL-STD-1553, A429, A664, and TSN.
  • Familiarity with tools like Vivado, Libero, Quartus, Diamond, and Mentor Graphics.

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