FPGA Verification Engineer

Anduril Industries

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Waltham, MA
Salary
$166,000–$220,000 / yr
Posted
14 days ago
Freshness
Confirmed live yesterday
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $184k
This role $193k
$133k most similar roles pay here $229k

This role pays more than 68% of similar roles. Most pay $160,000–$208,800 — the shaded band above. At the midpoint, this role pays about $193k versus about $184k for comparable roles.

Based on 240 similar postings.

Employer

About Anduril Industries

Anduril Industries is a defense technology company that builds advanced hardware and software systems for national security, including autonomous drones, surveillance systems, and the Lattice AI command platform.

Anduril Industries currently has 1697 open roles on FindRole.

Listed pay typically runs $146,000–$194,000 across 1504 roles with salary data.

Most-posted roles

View all roles at Anduril Industries

At a glance

TL;DR · FPGA Verification Engineer

Role Posting Log in to save

The FPGA Verification Engineer joins the Imaging team to support the design of new product lines involving electro-optical, infrared, and sensor data systems. Working within an interdisciplinary technical team, you will architect verification environments, develop testbenches for RTL blocks, create written test plans, and track code and functional coverage. You will also provide technical leadership by breaking down work, planning activities, and reporting status while recommending improvements for ASIC and FPGA verification flows. The role requires expertise in SystemVerilog, OVM/UVM, VHDL, Verilog, and Git or Subversion. Preferred skills include proficiency in Unix/Linux environments, scripting languages like Python or C++, and experience with tools such as QuestaSim, Synplify, Quartus, or Vivado. This position focuses on the technical challenge of developing hardware and software for advanced imaging systems to address critical security challenges.

Skills

SystemVerilog VHDL Verilog UVM OVM FPGA ASIC Python C++ C Perl Shell Git Subversion QuestaSim Synplify Quartus Vivado Linux Unix

What you'll do

  • Design and architect verification environments using SystemVerilog or OVM/UVM.
  • Develop testbenches for the verification of RTL blocks using VHDL or SystemVerilog.
  • Create written test plans, track code coverage, and monitor functional coverage.
  • Recommend new tools and practices to improve ASIC and FPGA verification flows.
  • Provide technical leadership by breaking down work, planning activities, and reporting status.
  • Contribute to engineering estimates for new program pursuits.
  • Manage source code and maintain configuration integrity using revision control systems like Git.

What we're looking for

  • A Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field is typically required.
  • 8+ years of experience developing HDL firmware for FPGA devices.
  • Experience designing and simulating RTL designs using VHDL and/or Verilog in professional FPGA or ASIC environments.
  • Proven ability to design and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog.
  • Experience applying chip-level verification methodologies including constrained-random testing, functional coverage analysis, and assertion-based verification.
  • Experience using revision control systems such as Git or Subversion to manage source code and collaborate across teams.
  • Eligibility to obtain and maintain an active U.S. Secret security clearance.
  • Proficiency in Unix/Linux environments, scripting languages (C, C++, Python, Perl), and industry-standard simulation tools like QuestaSim or Vivado.

Related searches

More FPGA Verification Engineer jobs FPGA Verification Engineer jobs in Waltham All jobs at Anduril Industries

More like this

Similar roles

Embedded FPGA Engineer

Booz Allen Hamilton

McLean, VA 85 days ago $86,800–$198,000
FPGA Vitis HLS Verilog VHDL SystemVerilog Xilinx Vivado Python C++ MATLAB TCL Linux UNIX DSP SOSA/VPX AXI‑Stream AXI‑Lite DMA Agile Jira
Save

Solution Validation Engineer FPGA/SoC

Amd

San Jose, CA 8 days ago $166,400–$249,600
FPGA SystemVerilog Verilog VHDL Vivado Vitis Embedded Linux Yocto C C++ Python Tcl PCIe LPDDR5 RISC-V ARM Cortex Baremetal Git Makefiles
Save

ASIC Verification Engineer

Broadcom

Irvine, CA +1 16 days ago $101,000–$162,000
SystemVerilog UVM Verilog VHDL C++ Python Perl TCL Ethernet ASIC Verification Logic Design Electronic Circuit Design Object Oriented Programming Scripting
5+ yrs exp
Save