SOC Power Architecture Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$99,400–$149,200 / yr
Posted
16 days ago
Freshness
Confirmed live yesterday
Closes
Feb 22, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $198k
This role $124k
$84k most similar roles pay here $245k

This role pays less than 95% of similar roles. Most pay $168,500–$227,350 — the shaded band above. At the midpoint, this role pays about $124k versus about $198k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · SOC Power Architecture Engineer

Role Posting Log in to save

As a SOC Power Architecture Engineer within the Camera Engineering group, you will focus on developing power-optimized multi-media hardware and systems architecture for next-generation SoCs. Your daily responsibilities include prototyping on-target power optimization features, performing waveform analysis, and implementing models for power projections, validation, and architectural trade-off analysis. You will establish use-case and hardware core power targets while collaborating with hardware and software design teams to validate these features from concept through implementation. The role requires expertise in electrical systems engineering, digital logic design, and ASIC implementation flows. Key technical competencies include experience with video encoder/decoder systems, camera systems, high-level synthesis tools, and power modeling simulation tools. You will address the critical challenge of providing optimized power solutions as fabrication technology nodes shrink while performance requirements continue to increase.

Skills

Electrical Systems Engineering Digital Logic Design ASIC Power Modeling High Level Synthesis Machine Learning Camera Systems Waveform Analysis Simulation Tools Verification

What you'll do

  • Prototype on-target power optimization features and perform waveform analysis.
  • Develop novel power-optimized multi-media hardware and system architectures for next-generation SoCs.
  • Create models for power projections, validation, and architectural trade-off analysis.
  • Establish specific use-case and hardware core power targets.
  • Collaborate with HW/SW teams to implement and validate power features from concept to production.
  • Perform competitive analysis and machine learning workload analysis.

What we're looking for

  • Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.
  • Solid foundation in Electrical Systems Engineering and Digital Logic Design.
  • Understanding of HW micro-architecture of digital systems and ASIC implementation flow from concept to production.
  • Knowledge of system level aspects of low power design and ability to model and analyze power at system and core levels.
  • Experience with video encoder/decoder systems and architecture.
  • Experience with camera systems and architecture.
  • Experience in power modeling, verification, and simulation tools.
  • Experience with high level synthesis tools and flow.
  • Competitive analysis and Machine Learning workload analysis experience (preferred).

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