SoC Power Modeling Engineer

As a SoC Power Modeling Engineer within the Silicon Engineering group, you will design state-of-the-art ASICs and focus on modeling power dissipation for various IPs including AI/ML accelerators, CPUs, Graphics, and memory caches. You will be responsible for establishing voltage-frequency operating points, modeling power delivery for specific customer use-cases, and determining peak current requirements for upcoming generations of SoCs. This role requires collaborating with architecture, thermals, PMIC, and system design teams to optimize power efficiency. You will also partner with lab and silicon characterization teams to correlate models with hardware data. Essential skills include proficiency in scripting, data analysis, and EDA tools, alongside a deep understanding of VLSI design flow, CMOS technology, on-die PDN electrical properties, power gating, and thermal control loops for mobile SoC designs.