SoC Power Modeling Engineer

As an SoC Power Modeling Engineer within the Silicon Engineering group, you will focus on modeling power dissipation and delivery for advanced ASICs. You will be responsible for establishing voltage-frequency operating points for various IPs, including Neural Engines, CPUs, Graphics, AI/ML accelerators, media IPs, caches, and fabric. Your daily work involves modeling power dissipation for specific customer use-cases and collaborating with architecture, design, thermals, PMIC, and system design teams to optimize power efficiency. You will also partner with lab, silicon characterization, and technology teams to correlate models with hardware data. Required skills include proficiency in scripting, data analysis, and EDA tools, alongside a deep understanding of low-power digital design, CMOS technology, VLSI flow, on-die PDN electrical properties, power gating, and thermal control loops for mobile SoC designs.