Silicon Diagnosis DFT Engineer

Amd

Confirmed live today High trust

Quick summary

Work type: On-site
Location: San Jose, CA
Salary: $216,000–$324,000 / yr
Posted: 4 days ago
Freshness: Confirmed live today
Closes: Oct 22, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $204k

This role $270k

$142k $344k

below market most similar roles pay here above market

This role pays more than 92% of similar roles. Most pay $177,237–$231,737 — the blue band above. At the midpoint, this role pays about $270k versus about $204k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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At a glance

TL;DR · Silicon Diagnosis DFT Engineer

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The Silicon Diagnosis DFT Engineer joins the team to improve and enhance debug and diagnosis capabilities while implementing features to meet new diagnosis challenges. In this PMTS role, you will conduct electrical and physical fault isolation by generating diagnosis patterns and collaborating with design, verification, test engineering, and yield analysis groups. Daily responsibilities include building layout databases for cross-probing, automating volume diagnosis and data analysis, and developing patterns for Soft-Defect-Location or Laser-Voltage-Imaging. You will utilize scan DFT techniques and commercial tools for ATPG and pattern validations. Required skills include proficiency in IC design, automation, and silicon product validation. Preferred technical expertise includes C/C++, Verilog, and scripting in Perl, Python, or TCL, alongside experience with ATE, yield analysis, and tools like VCS, Caliber, or Primetime.

Skills

DFT Scan DFT ATPG C/C++ Verilog Python Perl TCL Xilinx Vivado VCS Caliber Primetime IC Design Yield Analysis ATE RTL Layout Design DFX

What you'll do

Perform post-silicon electrical and physical fault isolation.
Generate scan diagnosis tests for fault isolation.
Build layout databases for diagnosis and cross-probing.
Automate volume diagnosis and data analysis.
Develop and apply diagnosis patterns for Soft-Defect-Location or Laser-Voltage-Imaging.
Work with verification and test teams to create diagnosable tests.
Collaborate with design and DFX teams to ensure diagnosable designs.

What we're looking for

Degree in Electrical Engineering.
Knowledge of IC design, verification, DFT (RTL, circuit, physical), and semiconductor physics.
Proficiency in IC design, automation, silicon product validation, characterization, or debug/diagnosis.
Expertise in scan DFT techniques and using commercial tools for ATPG and pattern validations.
Strong problem solving, communication, and teamwork skills.
Familiar with C/C++ or Verilog (preferred).
Fluent in scripting using Perl, Python, or TCL (preferred).
Experience in IC process technology, ATE, yield analysis, memory design, layout design, FPGA design tools, or validation tools (preferred).

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