This role pays less than
85%
of similar roles. Most pay
$165,000–$216,250
— the shaded band above.
At the midpoint, this role pays about
$148k
versus about
$191k
for comparable roles.
Based on 240 similar postings.
Employer
About SpaceX
SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.
SpaceX currently has
604 open roles
on FindRole.
Listed pay typically runs
$130,000–$155,000
across 440 roles with salary data.
As a Senior ASIC DFT Engineer at Silicon Engineering, you will be part of a dynamic team responsible for implementing and optimizing Design for Test (DFT) architectures on complex SoCs or ASICs. Your daily tasks include scan insertion, compression/decompression logic, memory BIST, and logic BIST using Siemens Tessent tools, as well as setting up ATPG methodologies and debugging non-timing gate-level simulations. You will also develop test scripts and automate processes with languages like Perl, Python, Tcl, or C++. The role requires extensive experience in post-silicon bringup, ATE platforms, and collaboration across design, verification, and manufacturing teams to ensure DFT features meet production requirements. Knowledge of industry standards such as IEEE 1500 and 1687 is essential, along with expertise in low-power DFT techniques and cell-aware fault models.