This role pays less than
92%
of similar roles. Most pay
$174,375–$227,900
— the shaded band above.
At the midpoint, this role pays about
$152k
versus about
$201k
for comparable roles.
Based on 240 similar postings.
Employer
About Microsoft
Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing
Microsoft currently has
518 open roles
on FindRole.
Listed pay typically runs
$119,800–$234,700
across 505 roles with salary data.
The Silicon Design Verification Engineer joins the Shared and Custom IP & Silicon team within the Compute Silicon & Manufacturing Engineering organization. This role focuses on the design, development, and manufacturing of high-performance computer chips for cloud infrastructure. The engineer will develop C and C++ based test content, low-level drivers, and custom firmware at the subsystem and SoC levels. Key responsibilities include managing FPGA prototyping platforms like HAPS or Xilinx, creating board images, and designing custom RTL for protocol interfaces. The candidate will utilize Python for tooling, along with JTAG debuggers, logic analyzers, oscilloscopes, and multimeters to resolve post-silicon issues. They will perform root-cause analysis on boot failures and connectivity problems while collaborating across design and firmware teams. Technical expertise includes SystemVerilog, assembly, linker scripts, and industry protocols like AMBA, SPI, I2C, and USB.
Develop C and C++ based test content, low-level drivers, and custom firmware at the subsystem and SoC levels.
Extend compile and build flows to support custom firmware-style tests.
Serve as technical owner for FPGA prototyping platforms by creating board images and bit files.
Design custom FPGA RTL for protocol interfaces and feature enablement.
Develop and extend custom Python tooling to interface with FPGA platforms.
Debug FPGA and post-silicon issues using JTAG debuggers, logic analyzers, oscilloscopes, and multimeters.
Lead post-silicon bring-up and validation in the lab to meet scheduled exit criteria.
Root-cause failing post-silicon tests by analyzing scan dumps and coordinating cross-team debug efforts.
What we're looking for
A Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of technical engineering experience.
A Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of technical engineering experience.
Ability to pass the Microsoft Cloud Background Check every two years.
Must provide proof of citizenship or protected status to access export-controlled information.
Experience developing C/C++ test content for subsystem and SoC verification including bare-metal and firmware-style tests (preferred).
Experience bringing up and maintaining FPGA prototyping or emulation platforms like HAPS or Xilinx (preferred).
Hands-on hardware debug experience with JTAG debuggers, logic analyzers, oscilloscopes, and multimeters (preferred).
Proficiency in Python or other scripting languages for test automation and build flows (preferred).