This role pays less than
63%
of similar roles. Most pay
$174,206–$222,000
— the shaded band above.
At the midpoint, this role pays about
$177k
versus about
$198k
for comparable roles.
Based on 240 similar postings.
Employer
About Microsoft
Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing
Microsoft currently has
518 open roles
on FindRole.
Listed pay typically runs
$119,800–$234,700
across 505 roles with salary data.
As a Senior Verification Engineer within the Silicon, Cloud Hardware, and Infrastructure Engineering team, you will join a design verification group focused on developing AI components. You will lead a pre-silicon verification team for custom Intellectual Property and Subsystem components, ensuring that implementations meet architectural and micro-architectural intents. Your daily responsibilities include writing, executing, and debugging constrained random stimulus, scoreboards, checkers, and assertions to verify design correctness. You will develop Universal Verification Methodology (UVM) components to interface between test code and simulation environments while utilizing Agile methodologies for sprint planning and feature deployment. The role requires expertise in Verilog RTL debugging, AXI protocols, and scripting languages like Python, Bash, or Perl. This position addresses the technical challenge of verifying complex AI/Machine Learning SoCs and interconnect fabrics within cloud infrastructure hardware.
Lead pre-silicon verification teams for custom IP and subsystem components focusing on architectural functions.
Verify features and functionality of AI components within the design verification team.
Write, execute, and debug constrained random stimulus, scoreboards, checkers, and assertions to ensure design correctness.
Develop Universal Verification Methodology (UVM) components to interface between test code and simulation environments.
Collaborate with architecture and design teams to ensure implementations meet micro-architectural intent.
Provide technical leadership through mentorship and team guidance.
Execute Agile development methodologies including code reviews, sprint planning, and feature deployment.
What we're looking for
A Doctorate with 1+ years experience, a Master's with 4+ years experience, or a Bachelor's with 5+ years of technical engineering experience is required.
Candidates must be able to pass Microsoft Cloud Background Checks and meet export control regulations regarding citizenship or residency status.
Experience in design verification for complex CPU, GPU, or SoC IPs is preferred.
Experience with interconnect fabrics, Network on Chip (NOCs), AXI protocols, or other complex IP blocks is preferred.
Experience with full product cycle IP/SoC verification from definition to silicon is preferred.
Experience working on AI/Machine Learning SoCs is preferred.
In-depth knowledge of UVM, C-based test environments, and debugging RTL designs in simulation or emulation is preferred.
Proficiency in scripting languages like Zsh, Bash, Python, or Perl is preferred.
UVM
SystemVerilog
Verilog
Python
C++
HLS
VCS
Verdi
GDB
DisplayPort
HDMI
MIPI DSI
Assertion-based Verification
Functional Coverage
Constrained-random
Version Control