This role pays less than
91%
of similar roles. Most pay
$171,757–$227,900
— the shaded band above.
At the midpoint, this role pays about
$152k
versus about
$200k
for comparable roles.
Based on 240 similar postings.
Employer
About Microsoft
Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing
Microsoft currently has
518 open roles
on FindRole.
Listed pay typically runs
$119,800–$234,700
across 505 roles with salary data.
As a Design Verification Engineer II within the Verification & Validation team, you will support the Compute Silicon & Manufacturing Engineering organization by ensuring the quality of custom IP blocks and subsystem integrations. You will collaborate with partner teams to define verification strategies and test plans while developing UVM-based or Formal verification environments. Your daily work involves running and debugging simulations, applying random-stimulus and coverage-based techniques to identify bugs, and utilizing generative AI solutions to improve verification efficiency. The role requires proficiency in System Verilog Test Bench, Python for scripting, and an understanding of complex protocols like AXI, CHI, PCIe, or CXL. You will solve critical technical challenges related to the design, development, and manufacturing of high-performance computer chips used in large-scale cloud infrastructure to ensure reliable hardware performance and scalability.
What does a Design Verification Engineer earn?
Median $195800 from 64 postings across 10 companies.
Own verification for specific features of custom IP blocks or subsystem integrations.
Collaborate with partner teams to define verification strategies and test plans.
Develop UVM-based or Formal verification environments to drive product quality.
Run and debug simulations using random-stimulus and coverage-based techniques.
Innovate new methodologies and tools to improve overall verification efficiency.
Integrate generative AI solutions into daily verification workflows.
Coach and mentor team members in specific areas of technical expertise.
What we're looking for
A Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of technical engineering experience is required.
A Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of technical engineering experience is required.
Ability to pass the Microsoft Cloud Background Check and meet government security screening requirements.
Must provide proof of citizenship or protected status for assessment of eligibility to access export-controlled information.
2+ years of pre-silicon subsystem or IP/block level verification experience (preferred).
Understanding of fabric interconnects, coherency, CHI, AXI, AMBA, virtualization, security, interrupts, PCIe, CXL, or other complex subsystems (preferred).
Experience with UVM, SystemVerilog, and Python for test bench creation and post-processing (preferred).
Experience applying generative AI to day-to-day tasks (preferred).