Senior ASIC Verification Engineer

Nvidia

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $136,000–$218,500 / yr
Posted: 67 days ago

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $188k

This role $177k

$126k most similar roles pay here $228k

This role pays more than 54% of similar roles. Most pay $158,850–$216,250 — the shaded band above. At the midpoint, this role pays about $177k versus about $188k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 563 open roles on FindRole.

Listed pay typically runs $168,000–$264,500 across 556 roles with salary data.

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At a glance

TL;DR · Senior ASIC Verification Engineer

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NVIDIA is hiring an elite ASIC Verification Engineer to join its dynamic ASIC Verification team at a senior level. This role involves verifying the design and implementation of cutting-edge GPUs, requiring you to develop advanced verification methodologies such as UVM for complex systems. You will collaborate closely with architects, designers, and other verification teams to ensure the correctness of GPU designs through comprehensive testing and debugging using tools like VCS and Debussy. Ideal candidates possess a Bachelor’s Degree in EE, CS, or CE, along with extensive experience in SystemVerilog, C++, and functional coverage techniques, making significant contributions to the development of consumer graphics and AI technologies.

Skills

SystemVerilog C++ UVM VCS Debussy GDB Python CI/CD Git Linux ASIC GPU Computer Architecture Digital Design Processor Pipeline Verification

What you'll do

Verify design and implementation of leading GPUs using advanced methodologies like UVM.
Define verification scope for ASIC designs and develop necessary infrastructure.
Collaborate with architects to verify micro-architecture correctness and functionality.
Craft test bench environments for unit-level and system-level verification.
Utilize SystemVerilog or similar HVL for verification tasks.

What we're looking for

Bachelor’s Degree in EE, CS, or CE; or equivalent experience.
Experience in advanced verification methodologies like UVM.
Proficiency in SystemVerilog and C++ programming.
Expertise in design and verification tools such as VCS and debug tools.
Ability to craft test bench environments for unit- and system-level verification.
Strong understanding of computer architecture and digital build fundamentals.

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