IP Verification Engineer

Amd

Confirmed live yesterday High trust

Hybrid

Quick summary

Work type: Hybrid
Location: San Jose, CASan Diego, CAAustin, TXLongmont, CO
Salary: $166,400–$249,600 / yr
Posted: 24 days ago
Freshness: Confirmed live yesterday
Closes: Aug 18, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $186k

This role $208k

$122k most similar roles pay here $263k

This role pays more than 72% of similar roles. Most pay $159,937–$212,125 — the shaded band above. At the midpoint, this role pays about $208k versus about $186k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · IP Verification Engineer

Role Posting Log in to save

As a Senior ASIC Verification Engineer on the front-end design and integration team, you will work closely with architecture, IP design, physical design, and product engineers to achieve first pass silicon success for FPGA and ASIC products. You will be responsible for developing test plan documentation, coding UVM based testbenches including monitors, scoreboards, and checkers, and building directed and random verification tests. Your daily work involves running regressions and debugging failures to ensure high functional and performance quality. The role requires expertise in Verilog, SystemVerilog, Object Oriented programming, and Python or Perl for scripting and automation. You will focus on PCIe, CXL, NVMe, or Ethernet protocols within the context of complex IP architectures. This position demands strong knowledge of computer architecture and systems to solve challenges in high-performance computing environments.

Skills

System Verilog UVM Verilog ASIC Verification PCIe CXL NVMe Ethernet Python Perl FPGA HLS Computer Architecture Scripting Automation Simulation Tools

What you'll do

Collaborate with architects and engineers to understand new features for PCIe CXL based IPs.
Develop comprehensive test plan documentation covering hardware, firmware, and software driver use cases.
Code UVM-based testbenches and verification components including monitors, scoreboards, and checkers.
Build both directed and random verification tests for IP and subsystem levels.
Run regressions and debug test failures to ensure high design functional and performance quality.
Automate verification processes and flows using Python or Perl scripting.
Ensure first pass silicon success through rigorous front-end design and integration verification.

What we're looking for

Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
Experience with PCIe, CXL, NVMe, or Ethernet protocols.
Proficiency in IP level ASIC verification.
Expertise in Verilog, SystemVerilog, and Object Oriented programming.
Expertise in developing UVM based verification frameworks and testbenches.
Proficiency in Python and Perl for scripting and automation of verification processes.
Experience working in a team environment through the ASIC/FPGA project lifecycle from planning to tape out.
Strong communication skills and ability to work independently or in cross-site teams.

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