Senior Signal and Power Integrity Engineer

Nvidia

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Posted
46 days ago
Nearby
99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $178k
This role $177k
$126k most similar roles pay here $228k

This role pays more than 61% of similar roles. Most pay $157,061–$198,800 — the shaded band above. At the midpoint, this role pays about $177k versus about $178k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 967 open roles on FindRole.

Listed pay typically runs $168,000–$270,250 across 950 roles with salary data.

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At a glance

TL;DR · Senior Signal and Power Integrity Engineer

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As a Senior Signal & Power Integrity Engineer in our dynamic technology-focused company, you will lead board/system signal integrity design activities, including PCB stack-up design, material selection, and post-layout analysis. You’ll collaborate closely with the Package and PCB Design teams to optimize system performance and work with Application Engineering to support customer designs. Key responsibilities include system-level signal integrity simulation of interfaces like PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, and USB, as well as power delivery network optimization on PCBs. The ideal candidate has a BS/MS in Electrical Engineering or equivalent experience, along with hands-on expertise using tools such as HFSS, Sigrity, Hspice, and Cadence Allegro PCB designer. You should also have a strong understanding of high-speed interface design, package design, and signaling schemes like NRZ and PAM4.

Skills

HFSS Sigrity Hspice Cadence Allegro PCB designer Constraints Manager PCIE LPDDR DDR GDDR MIPI HDMI USB NRZ PAM4

What you'll do

  • Lead board/system signal integrity (SI) design activities including PCB stack up design and material selection.
  • Perform system-level SI simulation for interfaces such as PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB.
  • Optimize power delivery network (PDN) on printed circuit boards (PCBs).
  • Collaborate with Package and PCB Design teams to enhance system SI/PI performance.
  • Support customer board designs through Application Engineering team interactions.
  • Conduct TDR & VNA measurements for PKG/PCB material characterization and model correlation.

What we're looking for

  • BS/MS in Electrical Engineering or equivalent experience with at least 4 years as a SI/PI engineer.
  • Extensive hands-on experience with HFSS, Sigrity, Hspice, and other industry-standard simulation tools.
  • Expertise in high-speed electrical interfaces such as PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB.
  • Proficient in Cadence Allegro PCB designer and Constraints Manager or similar stack-up design tools.
  • Deep understanding of electromagnetics, channel components, and transmission line theory.
  • Experience analyzing and optimizing power delivery networks (PDN) on PCBs.
  • Familiarity with package design, interface timing budgets, and system modeling.

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