Senior Signal and Power Integrity Engineer

Nvidia

Confirmed live 2 days ago Trusted

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Posted
135 days ago
Freshness
Confirmed live 2 days ago

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $174k
This role $177k
$126k most similar roles pay here $228k

This role pays more than 58% of similar roles. Most pay $149,350–$197,780 — the shaded band above. At the midpoint, this role pays about $177k versus about $174k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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At a glance

TL;DR · Senior Signal and Power Integrity Engineer

As a Senior Signal and Power Integrity Engineer, you will join a dynamic team to lead board and system SI design activities including PCB stack up design, material selection, and layout reviews. You will perform system-level signal integrity simulations for high-speed interfaces such as PCIe, LPDDR/DDR/GDDR, MIPI, HDMI, and USB while analyzing and optimizing Power Delivery Networks on PCBs. Collaborating with Package and PCB Design teams, you will craft solutions for system performance and conduct TDR and VNA measurements for material characterization. The role requires expertise in electromagnetics, transmission line theory, and tools like HFSS, Sigrity, Hspice, and Cadence Allegro. You will address complex technical challenges involving high-volume manufacturing impacts on channel signal integrity and manage various signaling schemes including NRZ and PAM4 to ensure robust performance across diverse product lines.

What you'll do

  • Lead board and system SI design activities including PCB stack up, material selection, and layout review.
  • Perform system-level signal integrity simulations for high-speed interfaces like PCIe, DDR, and HDMI.
  • Analyze and optimize Power Delivery Networks (PDN) on PCBs.
  • Collaborate with Package and PCB Design teams to develop solutions for system SI/PI performance.
  • Provide technical support to Application Engineering for customer board designs.
  • Conduct TDR and VNA measurements for package and PCB material characterization and model correlation.

What we're looking for

  • BS/MS in Electrical Engineering or equivalent experience.
  • Minimum 4 years of experience as a SI/PI engineer.
  • Good understanding of electromagnetics, channel components, and transmission line theory.
  • Experience with high-speed electrical interfaces such as PCIe, LPDDR/DDR/GDDR, MIPI, HDMI, and USB.
  • Hands-on experience with HFSS, Sigrity, Hspice, or similar industry standard simulation tools.
  • Experience with Cadence Allegro PCB designer, Constraints Manager, or other PCB stack up design tools.
  • Understanding of the impacts of high-volume PCB manufacturing on channel signal integrity.
  • Familiarity with signaling schemes like NRZ and PAM4 is a plus.

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