Signal and Power Integrity Engineer

Nvidia

Actively hiring
Us, Ca, Santa Clara, US Posted 72 days ago $116,000$189,750 / year

At a glance

AI generated

TL;DR

As a Signal & Power Integrity Engineer at our cutting-edge technology firm, you will work on developing innovative solutions to complex system design challenges by modeling and optimizing various components using 3D EM tools. Your daily tasks include conducting high-speed interface simulations for NVLink, USB-4, PCIe5, GDDR6, LP5X, and other interfaces, while continuously improving SI models based on lab data and tool updates. You will also create substrate and board layout guidelines, automate simulations, gather and analyze data using tools like JMP and MATLAB, and collaborate with cross-functional teams to optimize package, PCB, ASIC, and mixed-signal circuit designs. The ideal candidate holds an MS or PhD in Electrical and Computer Engineering, with a strong background in electromagnetics, waveguides, transmission line theory, and signal processing, along with hands-on experience using ANSYS HFSS/Q3D, SIWAVE, ADS, Ansys Designer, and Cadence Allegro. Proficiency in Python for scripting and automation is also required.

Skills

ANSYS HFSS Python MATLAB JMP Cadence Allegro ADS Ansys Designer VNA TDR DSO ParBERT SIWAVE Grafana Prometheus CI/CD PostgreSQL AWS Kubernetes

What you'll do

  • Develop creative Signal Integrity solutions for complex system design issues.
  • Model and optimize various system components using 3D EM tools.
  • Conduct system-level signal integrity simulations for high-speed interfaces.
  • Improve SI models based on lab data and modeling tool updates.
  • Create, review, and extract substrate and board layout SI guidelines.

What we're looking for

  • MS or PhD in Electrical and Computer Engineering with at least 2 years of work experience.
  • Strong background in applied electromagnetics, waveguides, transmission line theory, and signal processing.
  • Experience with signal and power integrity concepts, design, and analysis.
  • Proficiency in using 3D modeling tools like ANSYS HFSS/Q3D and scripting for data post-processing.
  • Familiarity with VNA, TDR, DSO, ParBERT, ADS, Ansys Designer, JMP, Matlab, and Cadence Allegro.
  • Understanding of circuit equalization techniques and PDN evaluation using layout extraction tools.

Market check

Salary context

This $116,000–$189,750 range sits above 40% of similar postings on FindRole.

Peer median band

$127,150$205,250

Median floor and ceiling across peers.

Typical midpoint (25–75%)

$137,863$191,750

Middle half of comparable postings.

Based on 240 comparable postings.

* 240 is the maximum number of comparable postings sampled.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 802 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 798 roles with salary data.

Most-posted roles

View all roles at Nvidia

More like this

Similar roles

Signal and Power Integrity Engineer - Hardware

Nvidia

Us, Ca, Santa Clara, US 72 days ago $116,000$189,750
ANSYS_HFSS ANSYS_Q3D ANSYS_SIWAVE Matlab JMP Cadence_Allegro PCIe USB GDDR6 LPDDR5X HBM SATA HDMI ADS VNA TDR DSO ParBERT SPICE PDN_Evaluation_Tools

Senior Signal and Power Integrity Engineer

Nvidia

Us, Ca, Santa Clara, US 29 days ago $136,000$218,500
HFSS Sigrity Hspice Cadence Allegro PCB designer Constraints Manager PCIE LPDDR DDR GDDR MIPI HDMI USB NRZ PAM4

Senior Signal and Power Integrity Engineer - Hardware

Nvidia

Us, Ca, Santa Clara, US 16 days ago $136,000$218,500
ANSYS_HFSS ANSYS_Q3D ANSYS_SIWAVE PCIe USB_4 GDDR6 LPDDR5X PDN_evaluation layout_extraction_tools spice_based_simulations VNA TDR DSO ParBERT JMP MATLAB

Signal and Power Integrity Engineer - New College Grad 2026

Nvidia

Us, Ca, Santa Clara, US 16 days ago $116,000$189,750
SIMPLIS PowerSI ANSYS HFSS ANSYS Q3D ANSYS SIwave Ansys 2D Python Scripting Electromagnetics Transmission_line_theory Signal_processing Power_integrity Die_package_board_decoupling Regulator_modeling On_die_current_di_dt_control Dynamic_clocking_throttling Package_board_PDN_guidelines Post_layout_PI_extractions

Signal Integrity Architect

Qualcomm

Santa Clara, Ca,Us, US 20 days ago $220,200$330,400
ANSYS HFSS Cadence Sigrity Dassault Systèmes CST Keysight ADS Synopsys HSPICE Unix/Linux EDA tools scripting MATLAB Perl Python DDR5 LPDDR5X PCIe CXL USB Ethernet CoWoS InFo EMIB RDL Cadence Allegro VNA oscilloscopes spectrum analyzers PCIE/I2C analyzers traffic generators TDR differential probes