Senior Signal and Power Integrity Engineer

Nvidia

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Posted
25 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $174k
This role $177k
$126k most similar roles pay here $228k

This role pays more than 58% of similar roles. Most pay $149,350–$197,780 — the shaded band above. At the midpoint, this role pays about $177k versus about $174k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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At a glance

TL;DR · Senior Signal and Power Integrity Engineer

As a Senior Signal and Power Integrity Engineer, you will join a technical team focused on high-performance hardware systems. You will lead board and system SI design activities, including PCB stack up design, material selection, layout review, and post-layout analysis. Your daily responsibilities involve performing system-level signal integrity simulations for interfaces like PCIe, LPDDR/DDR/GDDR, MIPI, HDMI, and USB while optimizing Power Delivery Networks on PCBs. You will collaborate with Package and PCB Design teams to craft performance solutions and work with Application Engineering to support customer board designs. Required expertise includes electromagnetics, transmission line theory, and proficiency in tools such as HFSS, Sigrity, Hspice, and Cadence Allegro. You will also perform TDR and VNA measurements for material characterization and model correlation to solve complex signal integrity challenges across various high-speed electrical interfaces.

What you'll do

  • Lead board and system signal integrity (SI) design activities including PCB stack up and material selection.
  • Perform system-level signal integrity simulations for high-speed interfaces like PCIe, DDR, MIPI, HDMI, and USB.
  • Analyze and optimize the Power Delivery Network (PDN) on printed circuit boards.
  • Collaborate with Package and PCB Design teams to develop solutions for system SI/PI performance.
  • Provide technical support to Application Engineering teams regarding customer board designs.
  • Conduct TDR and VNA measurements for package and PCB material characterization and model correlation.

What we're looking for

  • BS/MS in Electrical Engineering or equivalent experience.
  • Minimum 4 years of experience as a SI/PI engineer.
  • Good understanding of electromagnetics, channel components, and transmission line theory.
  • Experience with design and implementation of high-speed electrical interfaces like PCIe, LPDDR/DDR/GDDR, MIPI, HDMI, or USB.
  • Hands-on experience with HFSS, Sigrity, Hspice, or similar industry standard simulation tools.
  • Experience with Cadence Allegro PCB designer, Constraints Manager, or other PCB stack up designer tools.
  • Understanding of impacts of high-volume PCB manufacturing on channel signal integrity.
  • Expertise in high-speed interface SI/PI designs, package design, and system modeling (preferred); familiarity with NRZ, PAM4, and equalization schemes (preferred).

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