Senior Signal and Power Integrity Engineer, Hardware

Nvidia

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$168,000–$264,500 / yr
Posted
57 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $190k
This role $216k
$128k most similar roles pay here $279k

This role pays more than 83% of similar roles. Most pay $168,037–$212,718 — the shaded band above. At the midpoint, this role pays about $216k versus about $190k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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At a glance

TL;DR · Senior Signal and Power Integrity Engineer, Hardware

As a Senior Signal and Power Integrity Engineer - Hardware, you will join a dynamic team to develop creative signal integrity solutions for complex system design problems. Your daily responsibilities include modeling and optimizing components like vias, connectors, and sockets using 3D EM tools while performing system-level simulations for high-speed interfaces including NVlink, USB-4, PCIe5, GDDR6, and LP5X. You will create substrate and board layout guidelines, perform post-layout extractions, and automate data analysis using JMP or MATLAB. The role requires expertise in applied electromagnetics, transmission line theory, and signal processing. You will utilize tools such as ANSYS HFSS, Q3D, SIWAVE, ADS, and Cadence Allegro while performing lab measurements with VNA, TDR, and DSO equipment to solve critical interconnect challenges for high-speed systems and mixed-signal circuits.

What you'll do

  • Develop creative Signal Integrity solutions for complex system design problems.
  • Model and optimize vias, connectors, sockets, and breakout components using 3D EM tools.
  • Perform system-level SI simulations for high-speed interfaces like NVLink, USB-4, PCIe5, and GDDR6.
  • Update and improve SI models using lab measurement data and updated modeling methodologies.
  • Create substrate and board layout SI guidelines and perform post-layout extractions.
  • Automate simulation processes and visualize data using JMP, MATLAB, or similar tools.
  • Optimize package, PCB, ASIC, and mixed-signal circuits in a cross-functional capacity.

What we're looking for

  • BS/MS in Electrical Engineering or equivalent experience.
  • 6+ years of industry experience.
  • Strong technical background in applied electromagnetics, transmission line theory, and signal processing.
  • Experience with signaling standards such as PCIe, USB, SATA, HDMI, HBM, DDR5, GDDR6, or LPDDR5X.
  • Hands-on use of 3D modeling tools like ANSYS HFSS/Q3D, SIWAVE, or Ansys2D.
  • Familiarity with system-level timing and loss budgets including silicon, package, and board impairments.
  • Proficiency with lab equipment such as VNA, TDR, DSO, and ParBERT.
  • Experience with software tools like ADS, Ansys Designer, JMP, MATLAB, or Cadence Allegro.

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