Senior Advanced FPGA Engineer

General Dynamics

Confirmed live yesterday High trust

Hybrid

Quick summary

Work type: Hybrid
Location: Annapolis Junction, MD
Salary: $160,085–$173,217 / yr
Posted: 14 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $193k

This role $167k

$138k most similar roles pay here $227k

This role pays less than 79% of similar roles. Most pay $169,591–$216,250 — the shaded band above. At the midpoint, this role pays about $167k versus about $193k for comparable roles.

Based on 240 similar postings.

Employer

About General Dynamics

General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.

General Dynamics currently has 1123 open roles on FindRole.

Listed pay typically runs $124,093–$150,385 across 984 roles with salary data.

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View all roles at General Dynamics

At a glance

TL;DR · Senior Advanced FPGA Engineer

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As a Senior Advanced FPGA Engineer, you will join a cross-functional team responsible for the full product lifecycle of cost-sensitive secure products. Your daily responsibilities involve managing design from system architecture and requirements allocation through to final production release. You will work with VHDL, Verilog, SystemVerilog, and TCL while utilizing Vivado tools and Zynq UltraScale+ MPSoC FPGAs. The role requires expertise in Git for version control, CI/CD flows, and managing Multi-Gigabit Transceivers like GTX or GTH. You will implement various bus protocols including Ethernet, Interlaken, Aurora, RS-232, SPI, I2C, and CAN while interfacing with DRAM and SRAM. Additionally, you will perform static timing analysis, timing closure, and floor planning for designs featuring embedded hard and soft processors alongside commercial and custom IP to solve complex technical challenges in the defense sector.

Skills

VHDL Verilog SystemVerilog TCL Vivado Petalinux Yocto Buildroot Git CI/CD Ethernet Interlaken Aurora SerialLite II RS-232 SPI I2C CAN DRAM SRAM

What you'll do

Design products from system architecture and requirements allocation through production of cost-sensitive secure products.
Develop FPGA designs using VHDL, Verilog, SystemVerilog, or TCL.
Implement high-speed designs using Zynq UltraScale+ MPSoC and similar FPGA architectures.
Manage timing closure, floor planning, and static timing analysis for custom and commercial IP.
Integrate multi-gigabit transceivers and various bus protocols like Ethernet, Aurora, SPI, and I2C.
Interface hardware with external memory components such as DRAM and SRAM.
Utilize Git for version control and manage CI/CD flows for FPGA development.
Mentor junior staff and lead technical initiatives within a cross-functional team.

What we're looking for

Bachelor's degree in Electrical or Computer Engineering (or related field) with at least 8 years of experience.
Master's degree with at least 6 years of relevant experience.
Ability to obtain a Department of Defense TS/SCI security clearance.
U.S. citizenship is required for the role.
Experience with VHDL, Verilog, SystemVerilog, and TCL or similar languages.
Proficiency with Zynq UltraScale+ MPSoC or similar FPGAs and Vivado tools.
Expertise in FPGA design principles, timing closure, floor planning, and multi-gigabit transceivers.
Experience with bus protocols (Ethernet, Interlaken, Aurora), memory interfaces, and Git version control.

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