Senior Advanced FPGA Engineer

General Dynamics

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Hybrid

Quick summary

Work type
Hybrid
Location
Annapolis Junction, MD
Salary
$160,085–$173,217 / yr
Posted
59 days ago
Freshness
Confirmed live today

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $186k
This role $167k
$137k $227k
below market most similar roles pay here above market

This role pays less than 70% of similar roles. Most pay $158,825–$214,000 — the blue band above. At the midpoint, this role pays about $167k versus about $186k for comparable roles.

Based on 240 similar postings.

Employer

About General Dynamics

General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.

General Dynamics currently has 1377 open roles on FindRole.

Listed pay typically runs $124,093–$150,385 across 1184 roles with salary data.

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View all roles at General Dynamics

At a glance

TL;DR · Senior Advanced FPGA Engineer

The Senior Advanced FPGA Engineer joins a cross-functional team responsible for product design from system architecture and requirements allocation through product release and production of cost-sensitive secure products. The engineer will perform FPGA design, ensuring timing closure and floor planning for designs featuring embedded hard and soft processors with commercial and custom IP. Key responsibilities include managing version control and CI/CD flows for FPGA. Required technical skills include VHDL, Verilog, SystemVerilog, and TCL, alongside experience with Zynq UltraScale+ MPSoC, Vivado, and Multi-Gigabit Transceivers. Candidates should possess expertise in bus protocols like Ethernet, Interlaken, Aurora, RS-232, SPI, I2C, and CAN, as well as DRAM and SRAM interfaces. This role solves technical problems within the domain of secure products for national security.

What you'll do

  • Design cost-sensitive secure products from system architecture and requirements allocation through production.
  • Develop FPGA designs using VHDL, Verilog, or SystemVerilog.
  • Implement designs on Zynq UltraScale+ MPSoC or similar FPGA platforms.
  • Perform static timing analysis, timing closure, and floor planning for custom and commercial IP.
  • Interface designs with external memory such as DRAM and SRAM.
  • Integrate high-speed bus protocols including Ethernet, Interlaken, Aurora, SPI, and I2C.
  • Manage version control and CI/CD flows for FPGA designs using Git.
  • Mentor junior engineers and lead technical initiatives within the hardware team.

What we're looking for

  • U.S. citizenship is required.
  • Ability to obtain a Department of Defense TS/SCI security clearance is required.
  • Bachelor's degree in Electrical or Computer Engineering, or a related field, plus a minimum of 8 years of relevant experience.
  • Master's degree plus a minimum of 6 years of relevant experience.
  • Solid experience in the principles and techniques of FPGA design.
  • Strong written and verbal communications skills.
  • Experience with VHDL/Verilog/SystemVerilog and TCL or similar languages (preferred).
  • Experience with Zynq processors using Petalinux, Yocto, or Buildroot (preferred).

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