Senior ASIC Floorplan Design Engineer
Nvidia
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How this pay compares to similar roles
This role pays more than 90% of similar roles. Most pay $174,843–$216,250 — the shaded band above. At the midpoint, this role pays about $253k versus about $196k for comparable roles.
Based on 240 similar postings.
Employer
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has 896 open roles on FindRole.
Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.
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At a glance
As a Senior ASIC Floorplan Design Engineer, you will join a multi-disciplinary team to design and implement leading SOCs, CPUs, and GPUs from the early architecture development phase through physical design. You will partner with product managers, architects, and packaging teams to craft chip floorplans that optimize cost, area, performance, and power for target markets. Your daily responsibilities include identifying and solving area, interconnect, timing, and floorplan improvement opportunities while developing AI workflows and productivity tools to enhance infrastructure for speed of execution. You will manage technical risks and collaborate on mitigation strategies. The role requires expertise in physical design methodologies, power/clock/reset distribution, DFT, place and route, and timing closure. Required skills include Python, Perl, or C++ programming, along with experience in chiplet based SOC projects and algorithm development for complex hardware systems.
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