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Active Keyword: Senior ASIC Floorplan Design Engineer Remove filter Clear all

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Senior ASIC Floorplan Design Engineer

Nvidia

Santa Clara, CA +1 13 days ago $196,000–$310,500
Actively hiring Confirmed live today High trust Above market
Physical Design Python C++ Perl DFT Place and Route Timing Closure Power/Clock/Reset Distribution Agentic AI Chiplet Packaging Algorithm Development
10+ yrs exp
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Senior ASIC Floorplan Design Engineer

Nvidia

Santa Clara, CA +1 159 days ago $196,000–$310,500
Actively hiring Confirmed live today Trusted Above market
ASIC Floorplan Design VLSI Computer Architecture Verilog System Verilog Python Perl C/C++ CAD Physical Design P&R Timing Closure Power/Clock Distribution Packaging
10+ yrs exp
Save