Senior ASIC Design Engineer, Agentic AI

Nvidia

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Santa Clara, CAAustin, TXDurham, NC
Salary
$168,000–$264,500 / yr
Employment
Full-time
Posted
123 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k
This role $216k
$131k $279k
below market most similar roles pay here above market

This role pays more than 80% of similar roles. Most pay $168,200–$216,250 — the blue band above. At the midpoint, this role pays about $216k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior ASIC Design Engineer, Agentic AI

Role Posting Log in to save

JOB TITLE: Senior ASIC Design Engineer - Agentic AI As a Senior ASIC Design Engineer - Agentic AI within the GPU Design Methodology team, you will join the AI for Chip Design group to develop agentic AI solutions for micro-architecture and RTL implementation. You will document design guidelines to help the ASIC team achieve high performance, area, and power efficiency targets. Your daily work involves designing and deploying LLM-powered solutions for engineering assistants and multi-turn, multi-modal dialogue systems. You must utilize Verilog for RTL development and Python for rapid prototyping, applying knowledge of data structures, algorithms, and software engineering. Required expertise includes logic synthesis, timing analysis, and fine-tuning large language models, building multi-agent systems, RAG pipelines, and vector databases to solve complex problems in chip design and computer architecture.

What does a ASIC Design Engineer earn in California?

Median $214000 from 49 postings across 7 companies.

See salary data

Skills

ASIC Design RTL Design Verilog Micro-architecture Logic Synthesis Timing Analysis Python LLM RAG Vector Databases Machine Learning VLSI Design Computer Architecture Agentic AI Digital Systems

What you'll do

  • Document and deliver design guidelines to help the ASIC team implement high-performance, area, and power-efficient RTL.
  • Develop agentic AI solutions to craft micro-architecture and implement RTL for chip designs.
  • Deliver fully verified, synthesis, and timing-clean designs for SoCs and GPUs.
  • Design and deploy LLM-powered solutions for engineering assistants and multi-modal dialogue systems.
  • Build advanced multi-agent systems, RAG pipelines, and vector databases for chip design.
  • Coordinate with tool and flow owners to ensure agentic solutions meet specific technical requirements.
  • Engage with the latest machine learning advancements to create powerful AI-driven engineering solutions.

What we're looking for

  • Master's or PhD degree in Electrical Engineering, Computer Science/Engineering, or a related field (or equivalent experience).
  • 8+ years of meaningful work experience.
  • Experience in micro-architecture and RTL development using Verilog in complex designs.
  • Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, and timing analysis.
  • Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic.
  • Proficiency in rapid prototyping using Python with strong foundational knowledge of data structures, algorithms, and software engineering principles.
  • Experience with fine-tuning large language models, building advanced multi-agent systems, RAG pipelines, and vector databases.
  • Strong analytical, communication, and interpersonal skills with a proven track record in dynamic, product-focused, and distributed teams.

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