Senior ASIC Design Engineer

Nvidia

Quick summary

Work type
On-site
Location
Santa Clara, CAAustin, TXDurham, NC
Salary
$168,000–$264,500 / yr
Posted
2 days ago

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $211k
This role $216k
$156k most similar roles pay here $276k

This role pays more than 59% of similar roles. Most pay $175,462–$246,150 — the shaded band above. At the midpoint, this role pays about $216k versus about $211k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 964 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 953 roles with salary data.

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At a glance

TL;DR · Senior ASIC Design Engineer

NVIDIA's AI for Chip Design team is hiring an experienced ASIC Design Engineer with a focus on agentic AI to join their global, cutting-edge group dedicated to pushing the boundaries of chip design. In this role, you will document and deliver design guidelines that enable high-performance RTL implementation, develop AI-driven solutions for micro-architecture and RTL development, and collaborate closely with other designers and tool owners to ensure seamless integration. You will also leverage large language models and advanced multi-agent systems to create innovative engineering assistants and dialogue systems. The ideal candidate holds a Master’s or PhD in Electrical Engineering, Computer Science, or related fields, with extensive experience in micro-architecture, RTL development, and AI technologies. Proficiency in Python, Verilog, and knowledge of digital systems and VLSI design is essential for tackling complex challenges at the intersection of research and product development.

What you'll do

  • Develop and document design guidelines for high-performance ASIC implementation.
  • Create agentic AI solutions to craft micro-architecture and implement RTL designs.
  • Ensure design guidelines meet requirements through collaboration with tool owners.
  • Use AI technologies to solve complex chip design problems and drive innovation.
  • Design and deploy LLM-powered engineering assistants and multi-modal dialogue systems.

What we're looking for

  • Master's or PhD degree in Electrical Engineering, Computer Science/Engineering, or related field.
  • 8+ years of experience in ASIC design and RTL development using Verilog.
  • Deep understanding of full ASIC design flow including verification and timing analysis.
  • Proficiency in Python for rapid prototyping with knowledge of data structures and algorithms.
  • Experience fine-tuning large language models and building multi-agent systems.
  • Strong analytical, communication, and interpersonal skills for dynamic team environments.
  • Proactive approach to problem-solving and continuous learning.

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