SOC Design Verification Engineer
Qualcomm
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How this pay compares to similar roles
This role pays less than 97% of similar roles. Most pay $177,250–$227,500 — the shaded band above. At the midpoint, this role pays about $127k versus about $202k for comparable roles.
Based on 240 similar postings.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 568 open roles on FindRole.
Listed pay typically runs $150,615–$222,050 across 554 roles with salary data.
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At a glance
As a Processor ASIC RTL Design Engineer within the ASICS Engineering group, you will contribute to the development of high performance, high quality, and low power products. You will be responsible for defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP block or SoC development. Your daily work involves creating architectures, circuit specifications, logic designs, and system simulations based on specific requirements. You will collaborate with cross-functional teams to develop implementation strategies and evaluate process flows from high-level design through synthesis, place and route, timing, and power use. To execute these tasks, you will utilize tools such as Virtuoso and RTL to GDS Flow while writing technical documentation for EDA, IP, and ASIC projects. The role requires proficiency in architecture and design tools, scripting tools, programming languages, and design verification methods.
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