Physical Design Engineer II (Silicon Engineering)

SpaceX

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Work type: On-site
Location: Austin, TX
Posted: today

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Similar $174k

$131k most similar roles pay here $222k

This listing doesn't post a salary. Most similar roles pay $144,500–$202,500.

Based on 239 similar postings.

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About SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.

SpaceX currently has 604 open roles on FindRole.

Listed pay typically runs $130,000–$155,000 across 440 roles with salary data.

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TL;DR · Physical Design Engineer II (Silicon Engineering)

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The Physical Design Engineer II role is part of the Silicon Engineering team at a leading technology company, targeting candidates with 3+ years of professional experience in RTL2GDSII physical design and flow development. This position involves working closely with EDA tools such as Cadence or Synopsys to optimize digital circuit designs for manufacturing, ensuring compliance with CMOS standards and integrating DFT/Scan/LBIST functionalities. Candidates should possess a strong understanding of standard cell libraries and their impact on the overall design process. The role demands expertise in scripting languages like Python or Perl alongside proficiency in Unix/Linux environments, catering to large-scale semiconductor projects that address complex business challenges in high-performance computing and advanced chip manufacturing.

Skills

EDA tools CMOS digital design principles Standard cells DFT Scan MBIST LBIST Physical design flows

What you'll do

Develop and optimize physical design flows for RTL2GDSII processes.
Utilize industry-standard EDA tools effectively in the physical design process.
Apply CMOS digital design principles to create efficient standard cell libraries.
Implement DFT/Scan/LBIST techniques to enhance testability of designs.
Ensure compliance with ITAR requirements for all project-related activities.

What we're looking for

3+ years of professional experience in RTL2GDSII physical design or physical design flow development.
Proficiency with industry-standard EDA tools and understanding of their capabilities and underlying algorithms.
Knowledge of CMOS digital design principles, standard cells, and libraries.
Basic understanding of DFT/Scan/MBIST/LBIST and their impact on physical design flows.
Compliance with U.S. Department of State ITAR requirements.

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