IP Verification Engineer

Arm Holdings

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Chandler, AZ
Salary
$130,100–$176,000 / yr
Posted
11 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $208k
This role $153k
$117k $255k
below market most similar roles pay here above market

This role pays less than 88% of similar roles. Most pay $173,281–$241,750 — the blue band above. At the midpoint, this role pays about $153k versus about $208k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 110 open roles on FindRole.

Listed pay typically runs $207,800–$281,200 across 108 roles with salary data.

Most-posted roles

View all roles at Arm Holdings

At a glance

TL;DR · IP Verification Engineer

The IP Verification Engineer joins the Solution Engineering division to develop testbenches and test suites for products across Enterprise, Auto, and Client markets. The role involves writing test plans, completing functional verification to specific quality levels, and developing IP features that enable reconfigurable designs. Key responsibilities include collaborating with design teams to review microarchitectural specifications, debugging issues, and ensuring high-quality solutions. Candidates must possess experience in test plan creation, testbench implementation, and coverage analysis for complex subsystems or SoCs. Required technical skills include front-end verification tools such as Questa, VCS, Jasper Gold, and Verdi, along with knowledge of UPF and debuggers. The position focuses on the verification of reconfigurable IP and subsystems within complex hardware architectures to ensure reliable performance across diverse computing and connectivity markets.

What you'll do

  • Write comprehensive test plans and complete functional verification to meet quality standards and schedules.
  • Develop testbenches and test suites for complex subsystems and SoCs.
  • Create IP features that enable reconfigurable designs.
  • Review microarchitectural specifications with the design team to identify and debug issues.
  • Implement test cases and manage functional, toggle, and code coverage.
  • Utilize front-end verification tools including dynamic/static simulation tools, UPF, and debuggers.
  • Provide documentation and support for the verification stages of the product lifecycle.

What we're looking for

  • Bachelor's degree or higher in Computer Science, Electrical/Computer Engineering, or a related field.
  • Experience in verification of complex subsystems or SoCs.
  • Experience in test plan creation, testbench implementation, test case development, documentation, and support.
  • Proficiency with front-end verification tools including Dynamic/Static Simulation tools, UPF, Debuggers, Questa, VCS, Jasper Gold, and Verdi.
  • Experience with Functional, Toggle, and Code coverage.
  • Experience in reconfigurable IP or subsystem design.
  • Object-oriented programming concepts (preferred).
  • Experience with ARM-based designs, ARM System Architectures, OTP/Fuse usage models, JTAG/TAP protocols, Perl, Python, SoC system debug, or DFT methodologies (preferred).

More like this

Similar roles

Senior IP Verification Engineer

Arm Holdings

Chandler, AZ 80 days ago $161,500–$218,500
Questa VCS Jasper Gold Verdi Python Perl UPF JTAG TAP DFT RTL Functional Verification Static Simulation Dynamic Simulation Object-Oriented Programming
Hybrid

Principal IP Verification Engineer

Arm Holdings

Chandler, AZ 26 days ago $249,900–$338,100
Front-end Verification SoC Python Perl VCS Questa Jasper Gold Verdi UPF DFT JTAG TAP RTL Static Simulation Dynamic Simulation Object-oriented programming
Hybrid

IP Verification Engineer

Amd

San Jose, CA +3 40 days ago $200,000–$300,000
System Verilog Verilog UVM Python Perl FPGA ASIC PCIe CXL NVMe Ethernet Object Oriented Programming HLS Computer Architecture Simulation

Security IP Verification Engineer

Arm Holdings

Austin, TX 66 days ago $161,500–$218,500
SystemVerilog UVM Verilog C Python Perl Tcl Formal Verification AXI AHB Cryptography Secure Boot Hardware Root of Trust Assembler Clock Domain Crossing Power Aware Verification
5+ yrs exp Hybrid

IP Verification Engineer

Amd

San Jose, CA +3 54 days ago $166,400–$249,600
System Verilog Verilog UVM ASIC Verification FPGA PCIe CXL NVMe Python Perl Scripting HLS Computer Architecture Object Oriented Programming Simulation Tape Out

Lead IP Verification Engineer

Amd

San Jose, CA 17 days ago $200,000–$300,000
UVM SystemVerilog Verilog PCIe CXL Python Perl FPGA Ethernet High-Speed Connectivity Object-Oriented Programming HLS Simulation Optimization Verification Automation Computer Architecture