Interconnect Micro-Architect and Design Development Lead

Amd

Confirmed live today High trust

Quick summary

Work type: On-site
Location: Austin, TX
Salary: $200,000–$300,000 / yr
Posted: 6 days ago
Freshness: Confirmed live today
Closes: Oct 21, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $210k

This role $250k

$138k $317k

below market most similar roles pay here above market

This role pays more than 81% of similar roles. Most pay $177,250–$241,750 — the blue band above. At the midpoint, this role pays about $250k versus about $210k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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At a glance

TL;DR · Interconnect Micro-Architect and Design Development Lead

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The Interconnect Micro-Architect and Design Development Lead is a senior technical leader on the Infinity Fabric Architecture and RTL team. This role involves driving the development and execution of key IP within a scalable, coherent on-chip interconnect for CPUs, GPUs, and other advanced processor products. You will translate architectural intent into high-quality implementations, resolve cross-component dependencies, and ensure designs meet functional, power, performance, area, and timing requirements. Key responsibilities include leading top-down development scoping, assessing technical risks, and managing implementation trade-offs. The position requires deep RTL design and microarchitecture expertise, specifically regarding NoC, cache, coherency, and ordering. You will utilize your engineering judgment to guide globally distributed teams through complex IP development from concept to silicon production while collaborating with architects, verification, and physical design teams.

Skills

RTL Design ASIC Design Microarchitecture CPU GPU NoC Cache Coherency Physical Design Silicon

What you'll do

Drive the development and execution of key IP within the scalable, coherent on-chip interconnect.
Translate architectural intent into actionable development work and high-quality RTL implementations.
Resolve cross-component dependencies to meet functional, power, performance, area, and timing requirements.
Lead top-down development scoping and provide data-driven assessments of engineering effort and technical risks.
Anticipate execution challenges and drive engineering responses to technical roadblocks and late-discovered bugs.
Conduct implementation reviews and technical readiness assessments across verification, physical design, and silicon teams.
Improve development processes, methodologies, tools, and team capabilities to enhance design quality and time-to-market.

What we're looking for

Experience in microprocessor and ASIC development from concept to production.
Proven experience leading engineers through technical expertise and influence in a matrixed environment.
Hands-on RTL design expertise with ability to resolve implementation challenges and evaluate technical trade-offs.
Ability to drive development across globally distributed teams and resolve cross-component dependencies.
Strong written and verbal communication skills with the ability to support timely, informed decisions.
Strong industry experience in IP or ASIC design development with technical leadership across multiple components through silicon delivery (preferred).
Deep RTL design and implementation expertise in CPU, GPU, NoC, cache, or related processor subsystems (preferred).
BS, MS, or PhD degree in Electrical or Computer engineering (preferred).

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