FE Engineer

Apple Inc

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Work type
On-site
Location
Austin, TX
Posted
31 days ago
Freshness
Confirmed live today

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How this pay compares to similar roles

Similar $177k
$126k most similar roles pay here $229k

This listing doesn't post a salary. Most similar roles pay $139,875–$214,000.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3587 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2768 roles with salary data.

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At a glance

TL;DR · FE Engineer

The FE Engineer joins the Front-End and Physical Design teams to drive methodology changes that improve performance, power, and area for next-generation GPU designs. This role involves collaborating with custom design teams to analyze standard cell and memory hard-IP offerings while driving the design of custom cells tailored specifically for GPU requirements. The engineer will also work with power teams to analyze GPU power and recommend reductions across architecture and gate-level designs. Key technical skills include proficiency in Python, Perl, or TCL for execution and debugging, alongside experience with industry standard tools like Innovus, ICC, Tempus, or Primetime. Candidates must apply knowledge of threshold voltage, parasitics, timing concepts, and low-power design techniques to optimize PPA targets while utilizing data analysis and visualizations to derive meaningful insights from complex large datasets during the optimization cycle.

What you'll do

  • Drive methodology changes with Front-End and Physical Design teams to improve performance, power, and area for next-generation GPU designs.
  • Analyze standard cell and memory hard-IP offerings to recommend usage for graphics FE/PD teams.
  • Drive the design of custom cells tailored specifically for GPU design requirements.
  • Analyze GPU power at architecture and gate-level stages to provide recommendations for power reduction.
  • Use scripting languages like Python, Perl, or TCL for execution, analysis, and debugging of designs.
  • Utilize industry-standard physical design tools to convert complex logical functions into physically realizable designs meeting PPA targets.
  • Perform timing closure using tools like Tempus or Primetime to ensure designs meet performance and electrical requirements.
  • Use data analysis and visualizations to convert large datasets from the optimization cycle into meaningful insights.

What we're looking for

  • Master's degree or foreign equivalent in Computer and Electrical Engineering or a related field.
  • 3 years of experience in the job offered or a related occupation.
  • 3 years of experience with threshold voltage, power, device variation, parasitics, noise, EA, and timing concepts.
  • 3 years of experience using scripting languages like Python, Perl, or TCL for design execution, analysis, and debug.
  • 3 years of experience using industry standard physical design tools such as Innovus or ICC to meet PPA targets.
  • 3 years of experience using timing closure tools such as Tempus or Primetime.
  • 3 years of experience with synthesis tools from Synopsys, Cadence, or Mentor to map RTL code into technology-specific gates.
  • 3 years of experience utilizing low power design concepts and data analysis/visualizations to optimize design performance.

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