Emulation Performance/Debug Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$121,800–$182,600 / yr
Posted
7 days ago
Freshness
Confirmed live yesterday
Closes
Mar 16, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $195k
This role $152k
$109k most similar roles pay here $238k

This role pays less than 85% of similar roles. Most pay $170,225–$219,500 — the shaded band above. At the midpoint, this role pays about $152k versus about $195k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 605 open roles on FindRole.

Listed pay typically runs $155,400–$233,100 across 582 roles with salary data.

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At a glance

TL;DR · Emulation Performance/Debug Engineer

The Emulation Performance/Debug Engineer joins the SoC digital hardware organization's Emulation Team to support pre-silicon platforms. This role involves developing and deploying uniform global methodologies for emulation build generation and debug across various FPGA configurations. The engineer will perform pre-silicon prototyping, bring up new FPGA hardware and software, and resolve low-level software and hardware issues. Key responsibilities include the validation of digital circuits and debugging SoC building blocks like interconnects, power management, and bus protocols. Required technical skills include expertise in Verilog, SystemVerilog, C programming, and scripting with Python and TCL. The role requires proficiency in FPGA tools, timing closure techniques, and JTAG or kernel debuggers. The work focuses on the pre-silicon enablement of new SoC designs involving CPU/DSP cores, multimedia, memory interfaces, and various peripheral components to ensure functional integrity before silicon production.

What you'll do

  • Develop and deploy global methodologies for emulation build generation and debug across FPGA platforms.
  • Perform pre-silicon prototyping for new SoC designs including enablement and bring-up.
  • Execute the bring-up of new FPGA emulation and prototyping hardware and software.
  • Debug low-level software and hardware issues using JTAG and kernel debuggers.
  • Validate and debug digital circuits and SoC building blocks like interconnects and power management.
  • Perform synthesis, place and route, and timing closure for emulation platforms.
  • Develop scripts in Python or TCL to support emulation workflows.

What we're looking for

  • Bachelor's degree in Science or Engineering with 2+ years of ASIC experience, Master's with 1+ year, or a PhD.
  • 5+ years of experience working in emulation and silicon environments.
  • Experience in design, development, and deployment of global methodologies for emulation build generation and debug across FPGA platforms.
  • Experience in pre-silicon prototyping, enablement, bring-up, and debugging of low-level software and hardware issues.
  • Proficiency in Verilog, SystemVerilog, C programming, Python, and TCL.
  • Expertise in Xilinx/Intel FPGAs, including tools and timing closure techniques.
  • Solid understanding of SoC building blocks, interconnects, power management, and basic power and performance concepts.
  • Experience with JTAG, kernel debuggers, and validation of digital circuits.

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