Principal Emulation Engineer

Samsung Semiconductor

Confirmed live today High trust

Quick summary

Work type: On-site
Location: San Jose, CA
Salary: $219,000–$351,000 / yr
Posted: 69 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $209k

This role $285k

$118k $376k

below market most similar roles pay here above market

This role pays more than 91% of similar roles. Most pay $185,225–$232,000 — the blue band above. At the midpoint, this role pays about $285k versus about $209k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 36 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 36 roles with salary data.

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At a glance

TL;DR · Principal Emulation Engineer

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The Principal Emulation Engineer joins the AGI Computing Lab to address complex system-level challenges for future AI/ML workloads. You will build, bring up, and maintain large-scale hardware emulation and FPGA prototyping platforms for memory-centric computing SoCs, enabling pre-silicon hardware and software validation. Key responsibilities include partitioning multi-million-gate designs, developing transactors, speed bridges, and co-emulation environments, and modeling memory subsystems and high-speed I/O interfaces. You will run AI/ML workloads to validate performance and debug hardware issues using waveform capture and assertions. Required expertise includes Cadence Palladium, Synopsys ZeBu, or Siemens Veloce, along with Synopsys HAPS or Cadence Protium. You must be proficient in Verilog, SystemVerilog, and scripting languages like Tcl, Python, or Perl to automate flows and support complex SoC designs.

Skills

FPGA Prototyping Hardware Emulation Verilog SystemVerilog Python Tcl Perl Cadence Palladium Synopsys ZeBu Siemens Veloce Synopsys HAPS Cadence Protium SCE-MI PCIe DDR HBM AXI CHI Ethernet AI/ML SoC Bring-up Pre-silicon Verification Waveform Capture

What you'll do

Build, bring up, and maintain large-scale hardware emulation and FPGA prototyping platforms for memory-centric computing SoCs.
Partition and map multi-million-gate designs onto emulation systems and multi-FPGA prototypes to optimize performance and debug visibility.
Develop transactors, speed bridges, and co-emulation environments to connect designs to host software and physical interfaces.
Model memory subsystems, clock and reset schemes, and high-speed I/O interfaces for accurate high-throughput prototyping.
Run AI/ML workloads and performance benchmarks pre-silicon to validate functionality and system-level performance.
Debug complex hardware and software issues using waveform capture, assertions, and coverage to drive root-cause analysis.
Develop and automate emulation and prototyping flows using scripting and agentic AI tools to improve turnaround time.

What we're looking for

Bachelor’s with 5+ years, Master’s with 3+ years, or PhD with 0+ years of industry experience.
Strong background in pre-silicon verification, validation, and SoC bring-up.
5+ years of experience in FPGA prototyping and large-scale hardware emulation of complex ASIC/SoC designs.
Hands-on experience with emulation platforms such as Cadence Palladium, Synopsys ZeBu, or Siemens Veloce.
Hands-on experience with FPGA platforms such as Synopsys HAPS or Cadence Protium, including multi-FPGA design partitioning and timing closure.
Experience with transactors, co-emulation (SCE-MI), speed bridges, and protocols like PCIe, DDR/HBM, AXI/CHI, or Ethernet.
Proficiency in Verilog/SystemVerilog and scripting in Tcl, Python, or Perl.
Experience running AI/ML workloads or system-level software pre-silicon.

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