Digital Design Engineer, Air Dominance and Strike

Anduril Industries

Confirmed live 2 days ago High trust

Quick summary

Work type
On-site
Location
Costa Mesa, CA
Salary
$146,000–$194,000 / yr
Posted
23 days ago
Freshness
Confirmed live 2 days ago

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $174k
This role $170k
$139k most similar roles pay here $204k

This role pays more than 58% of similar roles. Most pay $150,000–$197,750 — the shaded band above. At the midpoint, this role pays about $170k versus about $174k for comparable roles.

Based on 240 similar postings.

Employer

About Anduril Industries

Anduril Industries is a defense technology company that builds advanced hardware and software systems for national security, including autonomous drones, surveillance systems, and the Lattice AI command platform.

Anduril Industries currently has 1697 open roles on FindRole.

Listed pay typically runs $146,000–$194,000 across 1504 roles with salary data.

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At a glance

TL;DR · Digital Design Engineer, Air Dominance and Strike

Digital Design Engineer, Air Dominance and Strike joins the Electrical Engineering Team to develop high-reliability avionics, embedded processing, and power systems for Group 5 air vehicles and missile platforms. This role involves designing and integrating RTL for FPGA and SoC platforms used in mission-critical hardware. The engineer will manage the full development cycle, including microarchitecture, RTL implementation in VHDL, Verilog, or SystemVerilog, simulation, synthesis, timing closure, and lab bring-up. Key technical requirements include proficiency with Linux-based environments, Git workflows, and Tcl or Python scripting. Candidates must possess experience with high-speed interfaces like Ethernet, PCIe, and MIL-STD-1553 while navigating hardware/software co-design for autonomous air platforms. The role addresses the challenge of delivering flight-critical electronics that meet demanding performance and survivability requirements in complex digital hardware environments.

What you'll do

  • Design and implement RTL in VHDL, Verilog, or SystemVerilog for FPGA and SoC-based systems.
  • Translate system requirements into microarchitecture, interface definitions, and implementation plans.
  • Own functional blocks from initial architecture through integration, timing closure, and lab debug.
  • Execute simulation, synthesis, and implementation flows to achieve timing and resource closure.
  • Debug functional, timing, and integration issues in both simulation environments and on physical hardware.
  • Support board bring-up, lab validation, and system integration on target platforms.
  • Contribute to reusable design practices, coding standards, and development workflows.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
  • 2+ years of FPGA, ASIC, or closely related digital design experience.
  • Proficiency in VHDL and/or Verilog/SystemVerilog.
  • Hands-on experience with simulation, synthesis, implementation, and timing closure on modern FPGA platforms.
  • Experience with Linux-based development environments, Git-based workflows, and Tcl or Python scripting.
  • Ability to obtain and maintain an active U.S. Secret security clearance.
  • 4+ years of FPGA development experience (preferred).
  • Familiarity with high-speed interfaces, DO-254 standards, or specific FPGA vendor tools like AMD Vitis (preferred).

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