below marketmost similar roles pay hereabove market
This role pays less than
92%
of similar roles. Most pay
$168,500–$231,150
— the blue band above.
At the midpoint, this role pays about
$152k
versus about
$200k
for comparable roles.
Based on 240 similar postings.
Employer
About Amd
AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors
Amd currently has
502 open roles
on FindRole.
Listed pay typically runs
$168,000–$252,000
across 502 roles with salary data.
The CPU RTL Design Engineer joins the central core RTL team to design and optimize next-generation, high-performance processor cores for client, server, and AI platforms. The role involves designing and implementing RTL for CPU core pipeline components, contributing to microarchitecture definitions, and supporting design verification, synthesis, and timing closure. The engineer will work on subsystems such as load/store, decode, and execution units while analyzing performance, power, area, and timing characteristics. Required skills include Verilog and SystemVerilog RTL development, knowledge of out-of-order processor concepts, and experience with logic design. Candidates should be familiar with synthesis, place-and-route, static timing analysis, and scripting languages like Python or Tcl. The work addresses complex processor design challenges to improve scalability and power efficiency in modern digital design environments.
Design and implement RTL for CPU core pipeline components and related logic.
Contribute to the microarchitecture definition for next-generation processor cores.
Analyze and improve performance, power, area, and timing characteristics of designs.
Support design verification, synthesis, timing closure, and physical design efforts.
Investigate and resolve pre-silicon and post-silicon issues.
Evaluate design alternatives and technical trade-offs with cross-functional teams.
Contribute to scalable RTL methodologies, libraries, tools, and engineering best practices.
What we're looking for
Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
Demonstrated experience solving complex digital design or processor architecture problems.
Experience with Verilog/SystemVerilog RTL development in CPU, SoC, ASIC, or comparable digital design environments (preferred).
Understanding of modern CPU architecture, including out-of-order processor concepts (preferred).
Experience with logic design and high-performance processor pipeline development (preferred).
Experience with load/store, decode, execution, scheduling, or other CPU core subsystems (preferred).
Knowledge of power-efficient and low-power design techniques, including timing and power optimization (preferred).
Familiarity with synthesis, place-and-route, static timing analysis, and timing closure (preferred).