Circuit Design Engineer, Library/Process Monitor

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $129,300–$194,700 / yr
Posted: 2 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $205k

This role $162k

$116k $255k

below market most similar roles pay here above market

This role pays less than 77% of similar roles. Most pay $168,500–$241,750 — the blue band above. At the midpoint, this role pays about $162k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3499 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2707 roles with salary data.

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At a glance

TL;DR · Circuit Design Engineer, Library/Process Monitor

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Circuit Design Engineer - Library/Process Monitor joins the Digital Design Engineering group to support processor design efforts using deep submicron technologies. This role focuses on standard cell library designs where the engineer will drive transistor level circuit design, modeling, and performance analysis. Key responsibilities include optimizing library architecture to improve Power, Performance, and Area (PPA), identifying and reducing parasitics, and developing standard cell circuits for various technology and PDK releases. The engineer will also design process monitor IP on PNR blocks and validate other IPs in testchips. Required skills include engineering fundamentals, while preferred experience involves high-performance flip flops, level shifters, retention flops, RTL2GDSII flow, and Static Timing Analysis. The work involves collaborating with CPU, SOC, and GPU teams to meet physical design requirements.

Skills

Circuit Design Standard Cell Library PPA Layout Optimization PNR Process Monitor IP RTL2GDSII Static Timing Analysis STA PDK SOC GPU CPU Physical Design

What you'll do

Drive library architecture discussions and optimization efforts to improve overall Library PPA.
Identify and reduce parasitics to drive layout optimization and push circuit PPA.
Manage Library PPA for various technologies, architectures, and PDK releases.
Develop standard cell circuits that push design PPA boundaries.
Design process monitor IP on PNR blocks and validate other IPs in testchips.
Communicate physical design requirements to CPU, SOC, and GPU teams.

What we're looking for

A minimum of a bachelor's degree in a related field.
Experience in circuit design of high-performance flip flops, level shifters, retention flops, and other complex circuits (preferred).
Experience in RTL2GDSII flow and/or Static Timing Analysis (STA) (preferred).

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