Senior ASIC Design Verification Engineer
SpaceX
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How this pay compares to similar roles
This role pays more than 68% of similar roles. Most pay $168,500–$216,250 — the shaded band above. At the midpoint, this role pays about $212k versus about $192k for comparable roles.
Based on 240 similar postings.
Employer
SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.
SpaceX currently has 680 open roles on FindRole.
Listed pay typically runs $130,000–$165,000 across 442 roles with salary data.
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At a glance
Sr. ASIC Design Verification Engineer (Silicon Engineering) joins a cross-disciplinary team to develop next-generation ASICs for space and ground infrastructure. This role focuses on digital ASIC verification at both the block and system levels, where the engineer will write and review test plans, develop test harnesses and sequences, and execute regressions to achieve code and functional coverage closure. The position involves active participation in pre-silicon verification, chip bring-up, and post-silicon validation for complex digital designs. Key technical requirements include experience with UVM, OVM, or VMM methodologies, object-oriented programming, and constrained random verification. Candidates should also possess skills in scripting languages like Python for automation, along with RTL design knowledge. The work centers on creating high-performance chips to expand the capabilities of a global satellite network providing reliable internet connectivity in remote areas.
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