Senior ASIC Design Verification Engineer

SpaceX

Confirmed live 2 days ago Low trust

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Work type
On-site
Location
Austin, TX
Posted
59 days ago
Freshness
Confirmed live 2 days ago
Nearby
99+ roles within 25 mi

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Similar $192k
$141k most similar roles pay here $238k

This listing doesn't post a salary. Most similar roles pay $168,500–$216,250.

Based on 240 similar postings.

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About SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.

SpaceX currently has 680 open roles on FindRole.

Listed pay typically runs $130,000–$165,000 across 442 roles with salary data.

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At a glance

TL;DR · Senior ASIC Design Verification Engineer

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Sr. ASIC Design Verification Engineer (Silicon Engineering) joins a cross-disciplinary team to develop next-generation ASICs for space and ground infrastructure. This role focuses on digital ASIC verification at both the block and system levels, where the engineer will write and review test plans, develop test harnesses and sequences, and execute tests while ensuring code and functional coverage closure. The position involves pre-silicon verification, chip bring-up, and post-silicon validation to enhance the performance of the Starlink network. Key technical requirements include experience with UVM, OVM, or VMM methodologies, strong object-oriented programming knowledge, and constrained random verification. Candidates should possess skills in Python for automation and RTL design. The work addresses the challenge of providing reliable connectivity through advanced hardware components designed to operate in demanding orbital and terrestrial environments.

Skills

ASIC Design Verification UVM OVM VMM RTL Python Constrained Random Verification Test Bench Development Pre-silicon Verification Post-silicon Validation Chip Bring-up Object-Oriented Programming Digital Design

What you'll do

  • Perform digital ASIC verification at both the block and system levels.
  • Write and review comprehensive test plans for complex digital designs.
  • Develop test harnesses and automated test sequences.
  • Execute test plans, run regressions, and achieve code and functional coverage closure.
  • Contribute to pre-silicon verification and chip bring-up processes.
  • Perform post-silicon validation to ensure hardware reliability.
  • Implement coverage models and analyze results to verify design integrity.

What we're looking for

  • Bachelor's degree in electrical engineering or computer engineering.
  • 5+ years of experience with design verification and test bench development.
  • Experience with verification methodologies such as UVM, OVM, or VMM.
  • Strong object-oriented programming knowledge and coding skills.
  • Experience in constrained random verification.
  • Expertise in developing test plans, implementing coverage models, and analyzing results.
  • Experience with scripting languages like Python for automation.
  • Must be a U.S. citizen, national, lawful permanent resident, or eligible for required export control authorizations.

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