Senior ASIC Design Verification Engineer

SpaceX

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Work type
On-site
Location
Austin, TX
Posted
105 days ago
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Confirmed live today
Nearby
99+ roles within 25 mi

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About SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.

SpaceX currently has 851 open roles on FindRole.

Listed pay typically runs $130,000–$165,000 across 590 roles with salary data.

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TL;DR · Senior ASIC Design Verification Engineer

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The Sr. ASIC Design Verification Engineer joins the Silicon Engineering team to develop next-generation ASICs for space and ground infrastructures. This role focuses on digital ASIC verification at both the block and system levels to enable global connectivity through the Starlink network. Key responsibilities include writing and reviewing test plans, developing test harnesses and sequences, executing regressions, and achieving code and functional coverage closure. The engineer will also contribute to pre-silicon verification, chip bring-up, and post-silicon validation. Required skills include design verification and test bench development experience, with preferred expertise in UVM/OVM/VMM methodologies, object-oriented programming, constrained random verification, and Python for automation. The position requires solving complex digital design problems to expand the performance and capabilities of satellite broadband systems.

Skills

ASIC Design Verification UVM OVM VMM Python RTL Design Constrained Random Verification Pre-silicon Verification Post-silicon Validation Chip Bring-up Object-Oriented Programming Test Bench Development Coverage Models Scripting Digital Design

What you'll do

  • Perform digital ASIC verification at both the block and system levels.
  • Write and review comprehensive test plans, test harnesses, and test sequences.
  • Execute test plans and run regressions to achieve code and functional coverage closure.
  • Contribute to pre-silicon verification, chip bring-up, and post-silicon validation.
  • Develop and implement coverage models to analyze verification results.
  • Execute all necessary steps to fully verify complex digital designs independently.

What we're looking for

  • Bachelor’s degree in electrical engineering or computer engineering.
  • 5+ years of experience with design verification and test bench development.
  • Must be a U.S. citizen, national, lawful permanent resident, refugee, asylee, or eligible for Department of State authorization.
  • Advanced degree in electrical engineering or computer engineering (preferred).
  • Experience with verification methodologies such as UVM/OVM/VMM (preferred).
  • Strong object-oriented programming, problem-solving, and coding skills (preferred).
  • Experience in constrained random verification, developing test plans, and implementing coverage models (preferred).
  • Experience with scripting languages like Python, RTL design, and post-silicon validation (preferred).

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