ASIC Test Development Engineer

Cisco

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
San Jose, CA
Salary
$167,700–$245,200 / yr
Posted
15 days ago
Freshness
Confirmed live yesterday
Closes
Sep 30, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $187k
This role $206k
$132k most similar roles pay here $257k

This role pays more than 64% of similar roles. Most pay $158,450–$216,250 — the shaded band above. At the midpoint, this role pays about $206k versus about $187k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 196 open roles on FindRole.

Listed pay typically runs $167,700–$245,200 across 196 roles with salary data.

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At a glance

TL;DR · ASIC Test Development Engineer

As an ASIC Test Development Engineer within the Silicon Operations team, you will serve as a backbone for the ATE test bring-up process. You will collaborate with internal design teams and manufacturing partners to bring up tests, characterize units, and release test programs to production. Your daily responsibilities include supporting pattern generation and debugging, identifying gaps in test coverage, and designing new tests to improve overall coverage while managing high-volume manufacturing tests and quality issues. To succeed, you must be proficient in C, C++, Java, 93k test methods, PERL, and Python. You will also utilize Advantest 93000 testers for characterization and production testing. The role requires expertise in DFT insertion techniques including Scan, ATPG, JTAG, MBIST, PVT, and SerDes to solve critical manufacturing challenges and improve yield while reducing test time.

What you'll do

  • Execute ATE test bring-up processes for ASIC products.
  • Partner with design teams to bring up tests and characterize units.
  • Release validated test programs to production environments.
  • Perform pattern generation, debugging, and identification of test coverage gaps.
  • Design and implement new tests to improve overall coverage.
  • Manage high-volume manufacturing tests and quality issues with Tier-1 OSAT partners.
  • Execute yield improvement and test time reduction activities.

What we're looking for

  • Bachelor's degree or higher in Electrical Engineering, Computer Engineering, or equivalent experience.
  • 4+ years of experience in SOC/VLSI bring-up, production, characterization, and test engineering.
  • Working knowledge of Advantest 93000 tester (Smartest 7 and 8) or other ATE testers for characterization and production.
  • Proficiency in coding using C, C++, Java, 93k test methods, PERL, and Python.
  • Knowledge of state-of-the-art DFT insertion techniques including Scan, ATPG, JTAG, MBIST, PVT, and SerDes.
  • Experience with yield improvement and test time reduction activities.
  • Strong teamwork, collaboration, problem-solving, and conflict resolution skills.
  • Ability to communicate effectively across multi-functional teams up to the executive level.

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