ASIC Engineer

Cisco

Confirmed live yesterday High trust
Remote

Quick summary

Work type
Remote
Location
San Jose, CA
Salary
$155,000–$222,600 / yr
Posted
15 days ago
Freshness
Confirmed live yesterday
Closes
Oct 2, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $190k
This role $189k
$141k most similar roles pay here $239k

This role pays more than 52% of similar roles. Most pay $162,000–$217,500 — the shaded band above. At the midpoint, this role pays about $189k versus about $190k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 196 open roles on FindRole.

Listed pay typically runs $167,700–$245,200 across 196 roles with salary data.

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At a glance

TL;DR · ASIC Engineer

As an ASIC Engineer on the Silicon One team, you will develop, maintain, and enhance DFT CAD infrastructure and automation while supporting critical implementation flows such as Scan insertion, ATPG generation, and SPF generation. You will build utilities and automation tools using Python, Perl, Tcl, and Shell scripting to improve flow robustness, runtime, and scalability. The role involves debugging flow failures, creating regression frameworks and dashboards, and managing large-scale regressions on compute farms using LSF or equivalent schedulers. You will collaborate with design, verification, physical design, and CAD teams to resolve methodology issues. Required skills include Verilog/SystemVerilog programming, interactive and waveform debugging, and experience with industry-standard DFT/EDA tools. This role focuses on creating hardware platforms for the AI era, specifically supporting core switching, routing, and wireless products.

What you'll do

  • Develop, maintain, and enhance DFT CAD infrastructure and automation.
  • Support DFT implementation flows including Scan insertion, ATPG generation, and pattern simulation.
  • Create utilities and automation tools using Python, Perl, Tcl, and Shell scripting.
  • Debug DFT flow failures and resolve issues with design teams.
  • Build and maintain regression frameworks and dashboards on compute farms.
  • Improve the robustness, runtime, and scalability of existing flows.
  • Produce documentation, FAQs, and onboarding materials for internal users.
  • Manage tool qualification, release support, and regression signoff.

What we're looking for

  • Bachelor's degree in Electrical or Computer Engineering with 5+ years of ASIC Design experience.
  • Master's degree in Electrical or Computer Engineering with 3+ years of experience.
  • PhD in Electrical or Computer Engineering.
  • Experience with Verilog/SystemVerilog programming.
  • Experience with interactive and waveform debugging.
  • Experience with industry-standard DFT/EDA tools and collaborating with design, verification, and test teams.
  • Scripting experience in Python, Perl, TCL, or shell programming.
  • Experience with Synopsys Design Constraints (SDC) (preferred).

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