ASIC Package Design Manager

Broadcom

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Fort Collins, CO
Salary
$143,800–$230,000 / yr
Posted
51 days ago
Freshness
Confirmed live yesterday
Closes
Jan 18, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $203k
This role $187k
$132k most similar roles pay here $257k

This role pays less than 60% of similar roles. Most pay $175,000–$231,725 — the shaded band above. At the midpoint, this role pays about $187k versus about $203k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 119 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 105 roles with salary data.

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View all roles at Broadcom

At a glance

TL;DR · ASIC Package Design Manager

As an ASIC Package Design Manager, you will lead a worldwide R&D team of engineers designing complex flip-chip-BGA packages for high-performance ASICs. You will manage over twenty concurrent designs by tracking project plans, resources, and schedules while developing technical methodologies and steering package technology and design rules. The role involves managing team members to maximize productivity, collaborating with vendors and cross-functional partners, and overseeing the full package-design lifecycle. You will address technical challenges involving high-speed SerDes at 448G and higher, 5G RF/Microwave ADC/DAC, HBM, and DDR5. Key competencies include expertise in signal integrity, power integrity, and DFx trade-offs for manufacturability and reliability. Your work focuses on the integration of substrate and package designs into manufacturing flows for artificial intelligence, networking, high-performance computing, and 5G base stations.

What you'll do

  • Lead a team of engineers in designing complex flip-chip-BGA packages for high-performance ASICs.
  • Create and track project plans, schedules, and resources for over 20 concurrent designs.
  • Develop technical methodologies and steer package technology and design rules.
  • Manage the full package design lifecycle including substrate integration and manufacturing flows.
  • Oversee signal integrity (SI) and power integrity (PI) extractions and simulations.
  • Coordinate with internal teams and external vendors to ensure projects remain on schedule.
  • Evaluate and manage trade-offs for manufacturability, reliability, and assurance of supply.
  • Provide technical leadership for high-speed SerDes, HBM, and DDR5 technologies.

What we're looking for

  • BSEE/MSEE or similar degree in a related field.
  • 12+ years of experience in flip-chip-BGA package design, including high-speed SerDes.
  • Minimum of 3 years of experience in management.
  • Experience managing people and projects is preferred.
  • Knowledge of package-level signal integrity and power integrity.
  • Technical understanding of the package-design lifecycle and manufacturing flows.
  • Proficiency in technical methodologies, design rules, and project management for concurrent designs.
  • Ability to collaborate with worldwide teams across multiple time zones.

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