SI/PI Tech Project Manager

Broadcom

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Jose, CAFort Collins, CO
Salary
$143,800–$230,000 / yr
Posted
3 days ago
Freshness
Confirmed live yesterday
Closes
Feb 13, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $187k
This role $187k
$133k most similar roles pay here $240k

This role pays less than 54% of similar roles. Most pay $160,625–$213,687 — the shaded band above. At the midpoint, this role pays about $187k versus about $187k for comparable roles.

Based on 239 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 119 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 105 roles with salary data.

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View all roles at Broadcom

At a glance

TL;DR · SI/PI Tech Project Manager

The SI/PI Tech Project Manager joins a worldwide R&D team to lead engineers in designing complex flip-chip-BGA packages, PCBs, and system channel links for high-performance ASICs. This role involves managing project plans for over twenty concurrent designs while developing technical methodologies for signal and power integrity solutions. The manager will oversee team development, coordinate customer and vendor activities, and ensure projects remain on schedule. Key responsibilities include performing SI/PI EDA extractions and simulations, analyzing system level SerDes channel results, and managing lab measurements and equipment. The role requires expertise in high-speed SerDes at 448G and higher, Optics, 5G RF/Microwave ADC/DAC, HBM, and DDR5. The work addresses critical technical challenges in artificial intelligence, networking, high-performance computing, and 5G base stations by ensuring robust power delivery and signal integrity across various package and PCB designs.

What you'll do

  • Manage technical execution for over 20 concurrent package and PCB designs including scope, schedules, and resources.
  • Lead a team of engineers to design complex flip-chip-BGA packages and system channel links for high-speed SerDes.
  • Develop and implement technical methodologies for signal and power integrity solutions.
  • Communicate project status, risks, and next steps clearly to internal teams and customers.
  • Oversee the integration of package and PCB technologies into overall system implementations for AI, networking, and 5G.
  • Manage lab measurement correlation efforts and oversee the requirements for lab equipment.
  • Coordinate with global vendors and cross-functional partners to ensure project milestones are met.

What we're looking for

  • BSEE degree required.
  • 12+ years of experience in ASIC and system signal and power integrity for high-speed SerDes.
  • Minimum of 3 years of management experience.
  • Knowledge of package-level, PCB-level, and/or system level signal integrity and power integrity.
  • Technical understanding of SI/PI EDA extractions, simulations, lab measurements, and correlation efforts.
  • Experience managing people and projects (preferred).
  • Strong self-management, organization, and clear communication skills.
  • Ability to work on-site 5 days a week for real-time engagement with lab equipment and team co-design.

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