ASIC Design Manager

Apple Inc

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Quick summary

Work type
On-site
Location
Cupertino, CA
Salary
$206,200–$356,400 / yr
Posted
67 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $204k
This role $281k
$126k $381k
below market most similar roles pay here above market

This role pays more than 96% of similar roles. Most pay $176,200–$231,300 — the blue band above. At the midpoint, this role pays about $281k versus about $204k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · ASIC Design Manager

The ASIC Design Manager will lead a team of engineers to manage priorities, partner interactions, and individual career growth. This role involves architecting solutions for power management and other SOC level functions while reviewing and writing microarchitecture and design specifications for various IPs. Key responsibilities include planning and executing the integration of complex IPs into the SOC, owning high-quality design delivery, and supporting front-end integration activities such as Lint, CDC, Synthesis, and ECO. The manager must collaborate with IP Design, SOC Design Verification, Emulation, STA, and Physical Design teams, as well as software and systems groups. Required skills include experience with multiple clock domains, asynchronous interfaces, and front-end tools. Proficiency in scripting languages like Perl, Python, or TCL is also preferred.

What you'll do

  • Manage a team of engineers by prioritizing tasks and guiding their professional growth.
  • Architect solutions for SOC power management and other high-level SOC functions.
  • Write and review microarchitecture and design specifications for SOC-level IPs.
  • Plan and execute the integration of complex IPs into the SOC.
  • Support front-end integration activities including Lint, CDC, Synthesis, and ECO.
  • Coordinate with IP Design, Verification, Emulation, STA, and Physical Design teams.
  • Collaborate with software and systems teams to ensure high-quality product delivery.

What we're looking for

  • BS degree in a relevant field.
  • Minimum of 10 years of relevant industry experience.
  • Experience managing a team and serving as a technical lead (preferred).
  • Experience writing specifications and converting them to design (preferred).
  • Experience with multiple clock domains and asynchronous interfaces (preferred).
  • Hands-on experience in all aspects of the chip development process with proficiency in front end tools and methodologies (preferred).
  • Experience or knowledge of system architecture, CPU & IP Integration, and power and clock management designs (preferred).
  • Familiarity with software and operating concepts (preferred) and scripting languages like Perl, Python, or TCL (preferred).

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