This role pays more than
75%
of similar roles. Most pay
$175,000–$227,350
— the shaded band above.
At the midpoint, this role pays about
$227k
versus about
$201k
for comparable roles.
Based on 240 similar postings.
Employer
About Cisco
Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity
Cisco currently has
196 open roles
on FindRole.
Listed pay typically runs
$167,700–$245,200
across 196 roles with salary data.
As an ASIC Design Engineer Technical Lead within the Common Hardware Group, you will contribute to chip architecture definition, author design specifications, and perform micro-architecture reviews. You will implement Verilog RTL to meet specific timing and performance requirements while mentoring junior engineers on project tasks and problem-solving. Your daily responsibilities include collaborating with verification teams to close code coverage, working with physical design teams to resolve place-and-route issues, and performing post-silicon validation in the lab. The role requires expertise in Verilog, SystemVerilog, and waveform debugging, along with experience delivering designs from specification to tape-out. Preferred skills include scripting in Python, Perl, TCL, or shell programming. This position focuses on developing innovative hardware platforms for switching, routing, and wireless products, specifically addressing the technical challenges of the AI era through advanced silicon and optics.
ASIC Implementation
Synthesis
Design for Test
Floorplanning
Place and Route
Clock Methodology
Power Planning
Timing Closure
Signal Integrity
Physical Design