ASIC Design Engineer, Pixel IP

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Sunnyvale, CA
Salary
$184,700–$324,800 / yr
Posted
9 days ago
Freshness
Confirmed live yesterday
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $191k
This role $255k
$129k most similar roles pay here $346k

This role pays more than 97% of similar roles. Most pay $166,300–$216,250 — the shaded band above. At the midpoint, this role pays about $255k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · ASIC Design Engineer, Pixel IP

Role Posting Log in to save

As an ASIC Design Engineer - Pixel IP ANE, you will join the Hardware Technologies group to design next-generation Apple Neural Engine components. You will work within the pixel IP team, collaborating with cross-functional teams including architecture, verification, power, and physical design. Your daily responsibilities involve performing RTL design on high-speed, high-performance subsystems, ensuring design correctness through clock domain crossing analysis, and partnering with formal verification and DFT teams to ensure testability. You will also work with synthesis and static timing teams to produce high-quality netlists while managing power intent. The role requires extensive knowledge of computer architecture, specifically bus topologies and AMBA protocols. This position focuses on the technical challenges of developing high-performance machine learning systems and hardware for AI/ML applications within a complex computing environment.

What does a ASIC Design Engineer earn in California?

Median $214000 from 47 postings across 8 companies.

See salary data

Skills

RTL Design AMBA Computer Architecture Synthesis Static Timing Analysis Clock Domain Crossing DFT BIST Power Intent Formal Verification ASIC Design

What you'll do

  • Perform RTL design for high-speed, high-performance subsystems within the Neural Engine.
  • Collaborate with verification and formal verification teams to ensure full design and performance validation.
  • Work with physical design and static timing teams to produce high-quality netlists through synthesis.
  • Analyze clock domain crossing designs to ensure functional correctness.
  • Coordinate with DFT and BIST teams to ensure the design is fully testable.
  • Implement complex computer architecture features including AMBA bus topologies and protocols.
  • Integrate power intent requirements into the hardware design process.

What we're looking for

  • Bachelor of Science degree required.
  • Minimum of 10 years of experience in the field.
  • Extensive knowledge of computer architecture, including bus topologies and protocols like AMBA.
  • Experience working on large, high-speed compute systems.
  • Knowledge of Clock Domain Crossing designs for correctness.
  • Experience with synthesis and Static Timing Analysis.
  • Experience working with Power Intent.

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