ASIC Design Engineer, Pixel IP DMA

Apple Inc

Confirmed live today Low trust

Quick summary

Work type
On-site
Location
Sunnyvale, CA
Salary
$184,700–$324,800 / yr
Posted
171 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $199k
This role $255k
$129k $346k
below market most similar roles pay here above market

This role pays more than 95% of similar roles. Most pay $168,500–$229,100 — the blue band above. At the midpoint, this role pays about $255k versus about $199k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · ASIC Design Engineer, Pixel IP DMA

Role Posting Log in to save

JOB TITLE: ASIC Design Engineer - Pixel IP DMA The ASIC Design Engineer - Pixel IP DMA joins the Hardware Technologies group to develop high-performance, power-efficient system-on-chips. In this front-end design role, you will collaborate with architecture, design, and verification teams to build DMA engines that coordinate large data movements between the memory system and the Pixel IP Engine. Your daily responsibilities include exploring solutions to optimize performance, power, and area, detailing specifications, and building RTL designs. You will also work with verification teams to ensure functionality and performance. Required skills include experience in multimedia IP or SoC front-end ASIC RTL design, knowledge of AMBA protocols like AXI, AHB, and APB, and proficiency in synthesis, linting, and logic equivalence checks. The role focuses on data storage, memory controllers, and image processing.

What does a ASIC Design Engineer earn in California?

Median $214000 from 49 postings across 7 companies.

See salary data

Skills

ASIC Design RTL Design DMA Engines SoC AMBA AXI AHB APB Synthesis Linting Logic Equivalence Check Power Analysis Formal Verification Machine Learning Interconnects Memory Controllers Address Translation Caching

What you'll do

  • Build high-performance and low-power DMA engines to move data between the memory system and the Pixel IP Engine.
  • Explore technical solutions to enhance performance while minimizing power and area consumption.
  • Detail technical specifications for the Pixel IP DMA components.
  • Build RTL designs for the DMA engines.
  • Work with design and formal verification teams to verify functionality and performance.
  • Perform front-end implementation tasks including synthesis, linting, and logic equivalence checks.
  • Conduct area and power analysis for the designed components.

What we're looking for

  • 10 years of experience.
  • Experience in multimedia IP/SoC front-end ASIC RTL design (preferred).
  • Excellent written and verbal communication skills with tight-knit collaboration skills (preferred).
  • Experience working multi-functionally with architecture, design, and verification teams to specify, design, and debug designs (preferred).
  • Experience designing dedicated DMA engines, data storage, memory controllers, networking, image processing, and/or interconnects (preferred).
  • Good understanding of arbitration, address translation, caching, on-chip interconnects, and performance analysis (preferred).
  • Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB) (preferred).
  • Experience in front-end implementation tasks such as synthesis, area and power analysis, linting, and logic equivalence checks (preferred).

Related searches

More ASIC Design Engineer jobs ASIC Design Engineer jobs in Sunnyvale All jobs at Apple Inc

More like this

Similar roles

ASIC Design Engineer, Pixel IP DMA

Apple Inc

Sunnyvale, CA 171 days ago $150,400–$277,600
ASIC Design RTL Design DMA Engines SoC AMBA AXI AHB APB Synthesis Linting Logic Equivalence Check Power Analysis Formal Verification Machine Learning Interconnects Memory Controllers Address Translation Caching
3+ yrs exp
Save

ASIC Design Engineer, Pixel IP DMA

Apple Inc

Sunnyvale, CA 171 days ago $129,300–$194,700
ASIC Design RTL Design DMA Engines SoC AMBA AXI AHB APB Synthesis Linting Logic Equivalence Check Area and Power Analysis Formal Verification Machine Learning Image Processing Interconnects Memory Controllers
Save

ASIC Design Engineer, Pixel IP DMA

Apple Inc

Cupertino, CA 171 days ago $150,400–$277,600
ASIC Design RTL Design DMA Engines SoC AMBA AXI AHB APB Synthesis Linting Logic Equivalence Check Formal Verification Power Analysis Machine Learning Interconnects Memory Controllers Address Translation Caching
3+ yrs exp
Save

ASIC Design Engineer, Pixel IP DMA

Apple Inc

Cupertino, CA 171 days ago $129,300–$194,700
RTL Design ASIC Design DMA Engines AMBA AXI AHB APB Synthesis Linting Logic Equivalence Check Power Analysis Formal Verification SoC Machine Learning Image Processing Interconnects Memory Controllers
Save

ASIC Design Engineer

Apple Inc

Sunnyvale, CA 60 days ago $150,400–$277,600
Verilog System Verilog RTL ASIC Design SoC Synthesis AMBA AXI AHB APB Python Perl TCL CDC RDC Logic Equivalence Check Linting Formal Verification Digital Signal Processing power-gating
3+ yrs exp
Save

ASIC Design Engineer

Apple Inc

Sunnyvale, CA 60 days ago $184,700–$324,800
ASIC Design RTL Verilog System Verilog SoC Digital Design Synthesis Python Perl TCL AMBA AXI AHB APB power-gating CDC RDC Logic Equivalence Check Formal Verification
10+ yrs exp
Save