ASIC Design Engineer, Pixel IP DMA

Apple Inc

Confirmed live yesterday Low trust

Quick summary

Work type
On-site
Location
Sunnyvale, CA
Salary
$129,300–$194,700 / yr
Posted
126 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $200k
This role $162k
$117k most similar roles pay here $242k

This role pays less than 78% of similar roles. Most pay $172,000–$227,300 — the shaded band above. At the midpoint, this role pays about $162k versus about $200k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · ASIC Design Engineer, Pixel IP DMA

As an ASIC Design Engineer - Pixel IP DMA within the Hardware Technologies group, you will join the Pixel IP team to develop high-performance, power-efficient system-on-chips. You will work closely with architecture, design, and verification teams to build DMA engines that coordinate moving large amounts of data between the memory system and the Pixel IP Engine. Your daily responsibilities include exploring solutions to enhance performance while minimizing power and area, detailing specifications, building RTL designs, and collaborating with formal verification teams to verify functionality. The role requires expertise in front-end ASIC RTL design, including synthesis, linting, and logic equivalence checks. You will utilize knowledge of AMBA protocols like AXI, AHB, and APB, while addressing technical challenges involving arbitration, address translation, caching, on-chip interconnects, and performance analysis for machine learning applications or image processing.

What does a ASIC Design Engineer earn in California?

Median $214000 from 47 postings across 8 companies.

See salary data

What you'll do

  • Design high-performance and low-power DMA engines to move data between memory systems and Pixel IP Engines.
  • Develop RTL designs based on detailed technical specifications.
  • Explore architectural solutions to optimize performance while minimizing power and area consumption.
  • Partner with verification teams to validate functionality and performance through formal and functional methods.
  • Execute front-end implementation tasks including synthesis, linting, and logic equivalence checks.
  • Perform analysis on arbitration, address translation, caching, and on-chip interconnects.
  • Implement designs using common on-chip bus protocols such as AMBA (AXI, AHB, APB).

What we're looking for

  • Bachelor's degree is required.
  • Experience in multimedia IP or SoC front-end ASIC RTL design is preferred.
  • Experience designing dedicated DMA engines, data storage, memory controllers, networking, image processing, or interconnects is preferred.
  • Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB) is preferred.
  • Understanding of arbitration, address translation, caching, on-chip interconnects, and performance analysis is preferred.
  • Experience in front-end implementation tasks like synthesis, area/power analysis, linting, and logic equivalence checks is preferred.
  • Strong collaboration skills with excellent written and verbal communication are required.
  • Ability to work multi-functionally with architecture, design, and verification teams to specify, design, and debug designs is preferred.

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