ASIC Design Engineer, IP Integration & Implementation

Apple Inc

Confirmed live today Low trust

Quick summary

Work type: On-site
Location: Sunnyvale, CA
Salary: $150,400–$277,600 / yr
Posted: 68 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k

This role $214k

$135k $293k

below market most similar roles pay here above market

This role pays more than 68% of similar roles. Most pay $165,063–$219,500 — the blue band above. At the midpoint, this role pays about $214k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · ASIC Design Engineer, IP Integration & Implementation

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JOB TITLE: ASIC Design Engineer — IP Integration & Implementation As an ASIC Design Engineer — IP Integration & Implementation within the Hardware Technologies group, you will join the Pixel IP design team to develop high-performance, power-efficient system-on-chips. You will be responsible for complex subsystem integration and implementation, specifically building high-performance and low-power pixel processing engines for capturing and displaying images and video. Your daily tasks include writing micro-architectural specifications, authoring high-quality RTL with embedded assertions, and collaborating with physical design teams to optimize timing, area, and power. You will utilize industry-standard methodologies including logic synthesis, static timing analysis, and logic equivalence checking. Required skills include familiarity with AMBA bus protocols, UPF power intent specification, and scripting languages like Python, Perl, and TCL to manage multiple clock and reset domains.

What does a ASIC Design Engineer earn in California?

Median $214000 from 49 postings across 7 companies.

See salary data

Skills

RTL ASIC Design SoC Design AMBA AXI AHB APB UPF Python Perl TCL Logic Synthesis Static Timing Analysis Logic Equivalence Checking Formal Verification Floorplanning Timing Closure

What you'll do

Write detailed micro-architectural and integration specifications for complex subsystems.
Design digital hardware by writing high-quality RTL with embedded assertions and cover points.
Optimize timing, area, and power for silicon designs in coordination with physical design teams.
Implement industry best practices for managing power, clock, and reset domains.
Debug and verify functionality and performance with design verification and formal verification teams.
Build high-performance and low-power pixel processing engines for multimedia IP.

What we're looking for

Bachelor's degree and 3+ years of relevant industry experience.
Prior experience in IP/SoC design, integration at the chip or subsystem level, and implementation (preferred).
Knowledge of ASIC/FPGA design methodology, including logic synthesis, static timing analysis, and logic equivalence checking (preferred).
Experience with system design methodologies containing multiple clock and reset domains (preferred).
Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB) (preferred).
Experience in low-power design, tools, and methodologies including UPF power intent specification (preferred).
Familiarity with relevant scripting languages such as Python, Perl, or TCL (preferred).
Strong collaboration skills with excellent written and verbal communication (preferred).