ASIC Design and Integration Engineer

Apple Inc

Quick summary

Work type: On-site
Location: Beaverton, OR
Posted: 52 days ago
Nearby: 99+ roles within 25 mi

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How this pay compares to similar roles

Similar $193k

$143k most similar roles pay here $239k

This listing doesn't post a salary. Most similar roles pay $169,875–$216,250.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

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At a glance

TL;DR · ASIC Design and Integration Engineer

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Apple’s Silicon Engineering team seeks a senior-level ASIC Design Engineer to join their innovative group, focusing on the creation of custom SoCs that enhance product performance and efficiency. This role involves designing, implementing, and verifying complex ASICs using SystemVerilog, collaborating with verification teams for robust design validation, and integrating digital designs into comprehensive SoCs alongside hardware and software teams. The engineer will also conduct timing analysis and power optimization to meet PPA goals while creating detailed documentation. Essential skills include extensive experience in RTL design and verification, proficiency in SystemVerilog, synthesis, and timing analysis, as well as familiarity with high-speed I/O protocols like PCIe and custom ASIC design methodologies.

Skills

SystemVerilog RTL design synthesis timing analysis PCIe CDC RDC LINT LEC low-power design techniques FPGA prototyping high-speed I/O design power optimization

What you'll do

Design and implement complex ASICs using SystemVerilog for RTL development.
Conduct simulation-based verification to ensure robustness in digital designs.
Integrate digital designs into SoCs by collaborating with hardware and software teams.
Perform timing analysis and optimize power consumption to meet PPA goals.
Create detailed micro-architecture documentation for design clarity and traceability.

What we're looking for

8+ years of proven experience in ASIC design, including RTL design and verification.
Proficiency in SystemVerilog, synthesis, timing analysis, and formal verification methods.
Hands-on experience with high-speed I/O design and protocols like PCIe.
Expertise in custom ASIC design and FPGA prototyping.
Strong analytical skills for problem-solving and attention to detail.
Experience conducting comprehensive front-end chip development processes.

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