ASIC Design and Integration Engineer

Apple Inc

Quick summary

Work type
On-site
Location
Beaverton, OR
Posted
52 days ago

Market check

Salary context

How this pay compares to similar roles

Similar $193k
$143k most similar roles pay here $239k

This listing doesn't post a salary. Most similar roles pay $169,875–$216,250.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · ASIC Design and Integration Engineer

Apple’s Silicon Engineering team seeks a skilled ASIC Design Engineer to join their innovative group as they develop custom SoCs for Apple’s products. This role involves designing, implementing, and verifying complex ASICs using SystemVerilog, collaborating with cross-functional teams on integration and testing, conducting timing analysis and power optimization, and creating detailed documentation. The ideal candidate has 3+ years of experience in RTL design and verification, proficiency in ASIC design tools and methodologies, and a strong background in electrical or computer engineering. Experience with high-speed I/O protocols like PCIe, custom ASIC design, FPGA prototyping, and front-end chip development processes is preferred.

What you'll do

  • Design and implement complex ASICs using SystemVerilog for RTL development.
  • Conduct simulation-based and formal verification to ensure robust design validation.
  • Integrate digital designs into SoCs by collaborating with hardware and software teams.
  • Perform timing analysis and optimize power consumption to meet PPA goals.
  • Document micro-architecture and design details thoroughly for project clarity.

What we're looking for

  • 3+ years of proven experience in ASIC design, including RTL design and verification.
  • Proficiency in SystemVerilog, synthesis, timing analysis, and formal verification.
  • Experience with high-speed I/O design and protocols like PCIe.
  • Hands-on experience with custom ASIC design and FPGA prototyping.
  • Strong analytical skills and meticulous attention to detail.
  • Expertise in front-end chip development processes (CDC/RDC, LINT, LEC).
  • Knowledge of low-power design techniques and power optimization strategies.

More like this

Similar roles

ASIC Design and Integration Engineer

Apple Inc

Beaverton, OR 52 days ago
SystemVerilog RTL design synthesis timing analysis PCIe CDC RDC LINT LEC low-power design techniques FPGA prototyping high-speed I/O design power optimization

ASIC Design Engineer

Apple Inc

Beaverton, OR 52 days ago
Verilog Python Perl TCL Kubernetes CI/CD Docker Git JIRA Confluence PostgreSQL Mentor Graphics Calibre Synopsys DC Cadence Genus VCS Simulator ModelSim

ASIC Design Engineer

Apple Inc

Santa Clara, CA 27 days ago $126,800$190,900
RTL micro-architecture DRAM PHY architecture DFI interface dram interface calibration performance characterization parallel computer architectures SOC performance simulators power simulators

Careers

Qualcomm

Santa Clara, CA 92 days ago
Python Perl AMBA AHB APB AXI PCIe USB CoreSight AI/ML DFT FPGA CDC Clocking_architecture NoC