Advanced ASIC FPGA Verification Engineer

General Dynamics

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Remote

Quick summary

Work type
Remote
Location
Sudbury, MAScottsdale, AZ
Salary
$122,785–$136,215 / yr
Posted
1 day ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $188k
This role $130k
$111k $230k
below market most similar roles pay here above market

This role pays less than 93% of similar roles. Most pay $160,212–$215,250 — the blue band above. At the midpoint, this role pays about $130k versus about $188k for comparable roles.

Based on 240 similar postings.

Employer

About General Dynamics

General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.

General Dynamics currently has 1351 open roles on FindRole.

Listed pay typically runs $124,093–$150,385 across 1176 roles with salary data.

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At a glance

TL;DR · Advanced ASIC FPGA Verification Engineer

Role Posting Log in to save

The Advanced ASIC FPGA Verification Engineer joins the engineering team to lead the definition, design, verification, and documentation of ASIC and FPGA developments. This role involves determining architecture, defining module interfaces, and creating comprehensive test and simulation plans to establish functional criteria. You will build UVM testbenches, develop agents, and utilize bus functional models while performing constrained random testing and functional coverage analysis. Key technologies include SystemVerilog, UVM, and RTL simulation tools like Questa or Modelsim within Linux environments. You will also use Python, TCL, and shell scripts for automation, alongside Formal Verification tools. The work focuses on verifying Xilinx devices, SoCs, and AXI, PCIe, and SpaceWire interfaces, while also addressing DSP functions and complex memory designs to ensure high-speed hardware performance.

Skills

SystemVerilog UVM ASIC FPGA Verilog Python TCL Linux Questa ModelSim Formal Verification AXI PCIe DSP GitLab Constrained Random Testing Assertions VHDL

What you'll do

  • Define, design, verify, and document ASIC and FPGA developments.
  • Determine architecture, system simulation, and detailed design approaches.
  • Define module interfaces and all aspects of device design and simulation.
  • Create test and simulation plans that establish functional criteria.
  • Verify test results and analyze performance data.
  • Develop UVM testbenches for designs implemented in Xilinx devices and SoCs.
  • Debug FPGA/ASIC hardware and assist with hardware/software integration.
  • Use scripting languages like Python, TCL, and Shell scripts to automate tasks.

What we're looking for

  • U.S. citizenship is required.
  • Must be able to obtain a TS/SCI security clearance within a reasonable amount of time.
  • Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology, or Mathematics field.
  • 5+ years of job-related experience, or a Master's degree and 3 years of job-related experience.
  • Proficient use and understanding of ASIC/FPGA engineering concepts, principles, and theories.
  • Proficient written and verbal communications skills.
  • Proficient use of Microsoft Office applications.
  • Experience with scripting languages such as Linux shell scripts, TCL, or Python (preferred).

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