below marketmost similar roles pay hereabove market
This role pays more than
50%
of similar roles. Most pay
$168,500–$217,500
— the blue band above.
At the midpoint, this role pays about
$192k
versus about
$193k
for comparable roles.
Based on 240 similar postings.
Employer
About General Dynamics
General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.
General Dynamics currently has
1161 open roles
on FindRole.
Listed pay typically runs
$124,397–$153,102
across 1008 roles with salary data.
The Sr Principal ASIC FPGA Engineer joins the Space Systems Engineering team to lead the definition, design, verification, and documentation of ASIC and FPGA developments. This role involves determining architecture, system simulation, and detailed design approaches while defining module interfaces and device simulation. Key responsibilities include evaluating process flows such as high-level design, synthesis, place and route, timing, and power utilization. The engineer creates test plans, analyzes performance, and may manage technical subcontracts or supervise staff. Required skills include expertise in ASIC/FPGA engineering concepts, Microsoft Office applications, and project leadership principles like SPI/CPI and Earned Value. The position addresses complex technical problems within the space systems domain, requiring the ability to research feasibility, select reliable components, and identify opportunities to apply AI for continuous innovation.
Define, design, verify, and document ASIC and FPGA developments.
Determine architecture, system simulation, and detailed design approaches.
Define module interfaces and all aspects of device design and simulation.
Evaluate process flows including high-level design, synthesis, place and route, timing, and power utilization.
Create test and simulation plans to establish functional criteria and verify results.
Lead technical subcontract management including SOW development, proposal evaluation, and technical oversight.
Research customer design proposals and specifications to determine design feasibility.
Select components and equipment based on analysis of specifications and reliability.
What we're looking for
U.S. citizenship is required.
Must be able to obtain a TS/SCI security clearance within a reasonable time.
A Department of Defense TS/SCI security clearance is preferred at time of hire.
Bachelor's degree in Electrical or Computer Engineering, or a related field, plus a minimum of 10 years of relevant experience.
Master's degree plus a minimum of 8 years of relevant experience.
Demonstrated use and understanding of ASIC/FPGA engineering concepts, principles, and theories.
Demonstrated understanding and ability to apply project leadership principles including SPI/CPI, Earned Value, Cost Account Management, and Statistical Process Controls.
Demonstrated proficiency in Microsoft Office applications and strong written and verbal communication skills.
FPGA
SystemVerilog
UVM
Microchip Polarfire
Synthesis
Place and Route
Power Utilization
Agile
Microsoft Office
SPI
CPI
Earned Value
CostAccount Management
Statistical Process Controls
AI
FPGA
ASIC
VHDL
Verilog
C
C++
Xilinx Vivado
Altera Quartus
RTL
Computer Architecture
RISC-V
PCI Express
DDR
Cryptography
Secure Boot
Simulation
Synthesis
Place and Route
ASIC
FPGA
VHDL
Vivado
Libero
Mentor
Cadence
Xilinx
Microsemi
EDA Tools
Digital Design
Synthesis
Place and Route
power utilization
JTAG
Oscilloscopes
Logic Analyzers
System Simulation